ice_dpll_ufl_pin_state_set(9)

💅 ice_dpll_ufl_pin_state_set — Kernel API Manual ✨

okay so bestie, gather round, because this is a kernel API manual page and we're gonna read it together like it's the group chat. the star of the show is ice_dpll_ufl_pin_state_set(9) — yes that whole name, say it with your chest — and it lives in the Kernel API Manual. it's giving "small function, big responsibilities." 🎀

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🌸 NAME 🌸

ice_dpll_ufl_pin_state_set — set U.FL pin state on dpll device 💅

like literally that's the whole job. set the U.FL pin state. on the dpll device. no cap.

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✨ SYNOPSIS ✨

int ice_dpll_ufl_pin_state_set (const struct dpll_pin *pin , void
*pin_priv , const struct dpll_device *dpll , void *dpll_priv , enum
dpll_pin_state state , struct netlink_ext_ack *extack );

look at her. six parameters. main character energy fr fr. 🫶

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🦋 ARGUMENTS 🦋

• pin — pointer to a pin 🎀
• pin_priv — the private data pointer that got passed on pin registration
• dpll — the registered dpll pointer
• dpll_priv — the private data pointer that got passed on dpll registration
• state — the requested state of the pin (what you want it to be, bestie)
• extack — error reporting 👀

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💖 DESCRIPTION 💖

so this is a Dpll subsystem callback. its whole vibe? set the state of a pin. that's it, that's the function, and honestly? iconic. ⭐

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🔥 CONTEXT 🔥

Acquires and releases pf->dplls.lock 🔒

not me warning you about locking — it grabs it and then lets it go. balanced. responsible. we love a lock that doesn't overstay.

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🌈 RETURN 🌈

• 0 — success 🎉
• negative — error 😭

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👑 SEE ALSO 👑

the whole extended friend group, and yes, we're tagging everyone in the group chat. kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, enum ice_dpll_pin_type(9), and the rest of the roster:

ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9),
ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9),
ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9),
ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9),
ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9),
ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9),
ice_dpll_pin_disable(9), ice_dpll_pin_store_state(9),
ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9),
ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9),
ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9),
ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9),
ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9),
ice_dpll_output_state_set(9), ice_dpll_input_state_set(9),
ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9),
ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9),
ice_dpll_sma_direction_set(9), ice_dpll_sw_pin_state_get(9),
ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9),
ice_dpll_input_prio_set(9), ice_dpll_input_direction(9),
ice_dpll_output_direction(9), ice_dpll_pin_sma_direction_set(9),
ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9),
ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9),
ice_dpll_output_phase_adjust_set(9), ice_dpll_sw_phase_adjust_get(9),
ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9),
ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9),
ice_dpll_output_esync_get(9), ice_dpll_input_esync_set(9),
ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9),
ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9),
ice_dpll_sw_input_ref_sync_get(9), ice_dpll_rclk_state_on_pin_set(9),
ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9),
ice_dpll_txclk_state_on_dpll_set(9),
ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9),
ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9),
ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9),
ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9),
ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9),
ice_dpll_release_pins(9), ice_dpll_get_pins(9),
ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9),
ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9),
ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9),
ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9),
ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9),
ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9),
ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9),
ice_dpll_deinit_worker(9), ice_dpll_init_worker(9),
ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9),
ice_dpll_init_info_direct_pins(9),
ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9),
ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9),
ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9),
ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9),
ice_dpll_init_e825(9), ice_dpll_init_e810(9)

iykyk 💀 that's a lot of cross-references and every single one of them made the cut. no skipping, no summarizing, we respect the roster. 💜

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anyway bestie, that's the page 🧚 this lil delivery came from the source tree at ./drivers/net/ethernet/intel/ice, dated October 2026, and the page itself is ice_dpll_ufl_pin_state_set(9). go set some pin states, stay hydrated, and remember to release that lock. mwah 💋🌸