ice_dpll_txclk_work(9)
π ice_dpll_txclk_work β the kernel API manual, bestie edition π
okay so this is ice_dpll_txclk_work(9) from the Kernel API Manual and honestly? she's a little worker bee with main character energy. let's get into it πβ¨
β¨ NAME β¨
ice_dpll_txclk_work β applies a pending TX reference clock change π
like, the switch you asked for earlier? yeah, this is the part that actually goes and does it. no cap.
π¦ SYNOPSIS π¦
void ice_dpll_txclk_work (struct work_struct *work );
that's it. one argument. she's lowkey minimalist about it. π
πΈ ARGUMENTS πΈ
workβ awork_structthat's embedded instruct ice_dplls. that's the whole thing, that's the vibe check. it's not some random work struct, it lives inside theice_dpllsstruct, iykyk π«Ά
π DESCRIPTION π
okay so picture this: earlier, somebody queued up a TX reference clock switch request through the DPLL TXCLK pin set callback. this worker? it's the one who actually executes that outstanding request. she shows up, she does the job, she leaves β¨
and here's the important part β she performs only the operational part of the switch. that means she issues the necessary firmware commands to request a new TX reference clock selection (think: triggering an AN restart π). that's her whole contribution.
what she does NOT do is verify whether the requested clock was ultimately accepted by the hardware. nope, not her job, not her problem, she's just the messenger fr fr π
all the heavy lifting verification stuff happens later, after link-up, over in ice_txclk_update_and_notify. that's where you get:
- hardware verification β
- software state reconciliation β
- pin state notification β
- TXC DPLL lock-status updates β
so likeβ¦ don't @ her about hardware confirmation. she literally doesn't do that. π
π₯ CONTEXT π₯
- Runs in process context on
pf->dplls.wqand may sleep π΄ β yes bestie, she can sleep, it's fine, she's allowed - Serializes access to shared TXCLK state using
pf->dplls.lockπ β no racing, no chaos, we stay locked and loaded
π§ SEE ALSO π§
okay this list is long long, so buckle up buttercup π everything here is in the kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, plus the enum and all the friends:
enum ice_dpll_pin_type(9)ice_dpll_is_sw_pin(9)ice_dpll_is_reset(9)ice_dpll_pin_freq_set(9)ice_dpll_frequency_set(9)ice_dpll_input_frequency_set(9)ice_dpll_output_frequency_set(9)ice_dpll_frequency_get(9)ice_dpll_input_frequency_get(9)ice_dpll_output_frequency_get(9)ice_dpll_sw_pin_frequency_set(9)ice_dpll_sw_pin_frequency_get(9)ice_dpll_pin_enable(9)ice_dpll_pin_disable(9)ice_dpll_pin_store_state(9)ice_dpll_rclk_update_e825c(9)ice_dpll_rclk_update(9)ice_dpll_sw_pins_update(9)ice_dpll_pin_state_update(9)ice_dpll_hw_input_prio_set(9)ice_dpll_lock_status_get(9)ice_dpll_mode_get(9)ice_dpll_phase_offset_monitor_set(9)ice_dpll_phase_offset_monitor_get(9)ice_dpll_pin_state_set(9)ice_dpll_output_state_set(9)ice_dpll_input_state_set(9)ice_dpll_pin_state_get(9)ice_dpll_output_state_get(9)ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9)ice_dpll_sma_direction_set(9)ice_dpll_ufl_pin_state_set(9)ice_dpll_sw_pin_state_get(9)ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9)ice_dpll_input_prio_set(9)ice_dpll_input_direction(9)ice_dpll_output_direction(9)ice_dpll_pin_sma_direction_set(9)ice_dpll_pin_sw_direction_get(9)ice_dpll_pin_phase_adjust_get(9)ice_dpll_pin_phase_adjust_set(9)ice_dpll_input_phase_adjust_set(9)ice_dpll_output_phase_adjust_set(9)ice_dpll_sw_phase_adjust_get(9)ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9)ice_dpll_synce_update_e825c(9)ice_dpll_output_esync_set(9)ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9)ice_dpll_input_esync_get(9)ice_dpll_sw_esync_set(9)ice_dpll_sw_esync_get(9)ice_dpll_input_ref_sync_get(9)ice_dpll_sw_input_ref_sync_get(9)ice_dpll_rclk_state_on_pin_set(9)ice_dpll_rclk_state_on_pin_get(9)ice_dpll_txclk_state_on_dpll_set(9)ice_dpll_txclk_state_on_dpll_get(9)ice_generate_clock_id(9)ice_dpll_pin_ntf(9)ice_dpll_notify_changes(9)ice_dpll_is_pps_phase_monitor(9)ice_dpll_pins_notify_mask(9)ice_dpll_pps_update_phase_offsets(9)ice_dpll_update_state(9)ice_dpll_periodic_work(9)ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9)ice_dpll_get_pins(9)ice_dpll_unregister_pins(9)ice_dpll_pin_ref_sync_register(9)ice_dpll_register_pins(9)ice_dpll_deinit_direct_pins(9)ice_dpll_init_direct_pins(9)ice_dpll_deinit_rclk_pin(9)ice_dpll_init_pin_common(9)ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9)ice_dpll_init_fwnode_pins(9)ice_dpll_init_pins_e825(9)ice_dpll_init_pins(9)ice_dpll_deinit_dpll(9)ice_dpll_init_dpll(9)ice_dpll_deinit_worker(9)ice_dpll_init_worker(9)ice_dpll_phase_range_set(9)ice_dpll_init_info_pins_generic(9)ice_dpll_init_info_direct_pins(9)ice_dpll_init_info_pin_on_pin_e825c(9)ice_dpll_init_info_rclk_pin(9)ice_dpll_init_info_sw_pins(9)ice_dpll_init_info_txclk_pins_e825c(9)ice_dpll_init_pins_info(9)ice_dpll_deinit_info(9)ice_dpll_init_info_e825c(9)ice_dpll_init_info(9)ice_dpll_deinit(9)ice_dpll_init_e825(9)ice_dpll_init_e810(9)
see? told you it was a whole friend group ππ
and that's the tea, bestie π this little page came from ./drivers/net/ethernet/intel/ice and it's dated October 2026 β remember it fondly, she ate and left no crumbs πβ¨π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms