ice_dpll_deinit_pins(9)

Hey bestie 💖 welcome to this lil corner of the Kernel API Manual for ice_dpll_deinit_pins. Yes, the (9) is right there — kernel API territory, and we are keeping every single detail. The vibe? Direct pins are getting deinitialized. Cleanup era. ✨

🌸 NAME 🌸

ice_dpll_deinit_pins — deinitialize direct pins. That’s the name, and no cap it’s giving “log off, pins” energy. 🎀

✨ SYNOPSIS ✨

void ice_dpll_deinit_pins (struct ice_pf *pf , bool cgu );

🎀 ARGUMENTS 🎀

• pf — board private structure. The board’s private structure, exactly like the original says. 🫶
• cgu — if cgu is controlled by this pf. Yep, that’s the condition, bestie. 💅

🦋 DESCRIPTION 🦋

Okay so here’s the tea ☕: if cgu is owned, unregister directly connected pins from the dplls. That’s the move. It also releases resources of directly connected pins from the dpll subsystem. So it’s literally the deinit/cleanup moment for those direct pins — unregister from the dplls and release the dpll-subsystem resources. Slay. ✨

Lowkey important: this page is about deinitializing direct pins. The details above are the whole description, no extra lore added. 💖

💅 SEE ALSO 💅

Buckle up, bestie, this reference list is long and we are not skipping a single one. No cap. 🫡

• Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, enum ice_dpll_pin_type(9)
• ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9), ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9), ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9)
• ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9), ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9), ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9), ice_dpll_pin_disable(9)
• ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9)
• ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9), ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9), ice_dpll_output_state_set(9), ice_dpll_input_state_set(9)
• ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9), ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9), ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9)
• ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9), ice_dpll_input_prio_set(9), ice_dpll_input_direction(9), ice_dpll_output_direction(9)
• ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9)
• ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9), ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9)
• ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9)
• ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9), ice_dpll_txclk_state_on_dpll_set(9), ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9)
• ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9), ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9), ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9)
• ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9), ice_dpll_release_pins(9), ice_dpll_get_pins(9), ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9)
• ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9), ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9), ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9)
• ice_dpll_init_fwnode_pins(9), ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9), ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9), ice_dpll_deinit_worker(9)
• ice_dpll_init_worker(9), ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9), ice_dpll_init_info_direct_pins(9), ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9)
• ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9), ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9), ice_dpll_init_info_e825c(9), ice_dpll_init_info(9)
• ice_dpll_deinit(9), ice_dpll_init_e825(9), ice_dpll_init_e810(9)

That’s the whole page, bestie 💖 cute sign-off time: source/version is ./drivers/net/ethernet/intel/ice, dated October 2026, and the manual page is ice_dpll_deinit_pins(9) — periodt. ✨🎀