ice_dpll_input_prio_set(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… ice_dpll_input_prio_set β€” like, the whole page πŸ’…

okay so welcome to the Kernel API Manual, bestie ✨ this one's about ice_dpll_input_prio_set(9) and honestly it's giving "small function, big responsibilities" energy. let's get into it 🫢


🌸 NAME 🌸

ice_dpll_input_prio_set β€” set dpll input prio, fr fr πŸ’–


✨ SYNOPSIS ✨

int ice_dpll_input_prio_set (const struct dpll_pin *pin , void *pin_priv
, const struct dpll_device *dpll , void *dpll_priv , u32 prio , struct
netlink_ext_ack *extack );

like yeah it's a lot of arguments but she's worth it 😭


πŸŽ€ ARGUMENTS πŸŽ€

  • pin β€” pointer to a pin 🧚 that's the one we're doing stuff to
  • pin_priv β€” private data pointer passed on pin registration πŸ”₯ (not our data, it got handed to us)
  • dpll β€” registered dpll pointer πŸ‘‘ the main character itself
  • dpll_priv β€” private data pointer passed on dpll registration ⭐
  • prio β€” input priority to be set on dpll πŸ’… the whole point of the function ngl
  • extack β€” error reporting πŸ™ˆ so we can tell people what went wrong

πŸ¦‹ DESCRIPTION πŸ¦‹

so this is a dpll subsystem callback 🫢 it's the handler for setting the priority of an input pin. that's it, that's the vibe β€” someone wants to change a priority, this is where it lands ✨


🌈 CONTEXT 🌈

lowkey important: it acquires pf->dplls.lock πŸ”’ so yeah, mind the lock, iykyk


πŸ’œ RETURN πŸ’œ

  • 0 β€” success πŸŽ‰ slay
  • negative β€” failure πŸ˜­πŸ’€ not the vibe

πŸ‘‘ SEE ALSO πŸ‘‘

okay this list is long long but we do not skip 🫢 starting with the kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, then the enum ice_dpll_pin_type(9), and then, in order, bestie:

ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9), ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9), ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9), ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9), ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9), ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9), ice_dpll_pin_disable(9), ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9), ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9), ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9), ice_dpll_output_state_set(9), ice_dpll_input_state_set(9), ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9), ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9), ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9), ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9), ice_dpll_input_direction(9), ice_dpll_output_direction(9), ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9), ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9), ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9), ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9), ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9), ice_dpll_txclk_state_on_dpll_set(9), ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9), ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9), ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9), ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9), ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9), ice_dpll_release_pins(9), ice_dpll_get_pins(9), ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9), ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9), ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9), ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9), ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9), ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9), ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9), ice_dpll_deinit_worker(9), ice_dpll_init_worker(9), ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9), ice_dpll_init_info_direct_pins(9), ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9), ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9), ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9), ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9), ice_dpll_init_e825(9), ice_dpll_init_e810(9) 🩷

like, that's the whole friend group, no one left out πŸ’–


and that's a wrap!! this page lives in ./drivers/net/ethernet/intel/ice, from the October 2026 edition of the Kernel API Manual β€” go forth and set those priorities, bestie πŸŒΈβœ¨πŸ¦‹

πŸ“¦ where this page comes from