ice_dpll_sw...requency_set(9)

💅 ice_dpll_sw_pin_frequency_set — the Kernel API Manual page, bestie edition 💅

okay so this is a page from the Kernel API Manual (yes, section 9, the fancy kernel-doc one) and it's all about one lil callback. her name is ice_dpll_sw_pin_frequency_set, she sets the frequency of a SW pin, and she's lowkey iconic. let's get into it 🎀

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✨ NAME ✨

ice_dpll_sw_pin_frequency_set — the callback that sets the frequency of a SW pin 🦋

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🌸 SYNOPSIS 🌸

int ice_dpll_sw_pin_frequency_set (const struct dpll_pin *pin , void
*pin_priv , const struct dpll_device *dpll , void *dpll_priv , u64
frequency , struct netlink_ext_ack *extack );

like, that's the whole signature, no cap. copy it exactly, she's particular 💅

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💖 ARGUMENTS 💖

okay so six (6) things go in, bestie, and here's the vibe check on each one:

• pin — pointer to a pin. literally just a pin. 🎀
• pin_priv — the private data pointer that got passed on pin registration. she's the pin's plus-one.
• dpll — pointer to dpll. yep. that's the whole description. slay.
• dpll_priv — private data pointer passed on dpll registration. matching plus-one energy 🫶
• frequency — on success this holds the pin's frequency. so it comes back carrying the answer. main character.
• extack — error reporting. she's the one who tells you when things went sideways 😭

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🌈 DESCRIPTION 🌈

so what does she actually do? she calls the set frequency command for the corresponding and active input/output pin. that's it, that's the whole job, and she does it flawlessly ✨

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⭐ CONTEXT ⭐

heads up, this one calls a function that acquires and releases pf->dplls.lock — so yeah, there's locking happening, keep that in mind 🔥

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👑 RETURN 👑

• 0 — success 🎉
• negative — error: pin not active or couldn't get from hw 💀

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🦋 SEE ALSO 🦋

this list is long long, so buckle up bestie — every single one of these, no skipping, periodt:

Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c — enum ice_dpll_pin_type(9), ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9), ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9), ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9), ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9), ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9), ice_dpll_pin_disable(9), ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9), ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9), ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9), ice_dpll_output_state_set(9), ice_dpll_input_state_set(9), ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9), ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9), ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9), ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9), ice_dpll_input_prio_set(9), ice_dpll_input_direction(9), ice_dpll_output_direction(9), ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9), ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9), ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9), ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9), ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9), ice_dpll_txclk_state_on_dpll_set(9), ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9), ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9), ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9), ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9), ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9), ice_dpll_release_pins(9), ice_dpll_get_pins(9), ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9), ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9), ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9), ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9), ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9), ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9), ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9), ice_dpll_deinit_worker(9), ice_dpll_init_worker(9), ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9), ice_dpll_init_info_direct_pins(9), ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9), ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9), ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9), ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9), ice_dpll_init_e825(9), ice_dpll_init_e810(9)

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and that's the whole page, bestie, you ate that 🫶 this lil masterpiece lives over in ./drivers/net/ethernet/intel/ice and the page is dated October 2026 — iykyk 💜✨