ice_dpll_sw_...e_adjust_get(9)
π ice_dpll_sw_...e_adjust_get(9) π
okay so bestie, welcome to the Kernel API Manual β¨ β this is the page for ice_dpll_sw_...e_adjust_get(9) and honestly? it's a little callback with main character energy. it's the SW-pin phase-adjust get hook, no cap. let's get into it π«Ά
πΈ NAME πΈ
ice_dpll_sw_phase_adjust_get β callback for get SW pin phase adjust π
like, that's literally her whole job. she gets the phase adjust. that's the tweet.
β¨ SYNOPSIS β¨
int ice_dpll_sw_phase_adjust_get (const struct dpll_pin *pin , void
*pin_priv , const struct dpll_device *dpll , void *dpll_priv , s32
*phase_adjust , struct netlink_ext_ack *extack );
she takes a whole little entourage of arguments and returns an int. iconic behavior. π
π ARGUMENTS π
okay so here's the whole squad she rolls in with, and yes you need to know every single one:
pinβ pointer to a pin π§pin_privβ the private data pointer that got passed on pin registration (she remembers you from before, bestie π)dpllβ the registered dpll pointerdpll_privβ the private data pointer that got passed on dpll registrationphase_adjustβ on success this one holds the phase adjust value π₯ like, this is the whole point of her existence, she fills this inextackβ error reporting π£ (so when things go sideways, there's a paper trail)
π¦ DESCRIPTION π¦
so. Dpll subsystem callback. she wraps a handler for getting phase adjust on a sw pin. that's it, that's the vibe check β she's the cute little wrapper between the subsystem and the actual handler doing the work π
lowkey a middle-management queen and we respect her for it.
π CONTEXT π
Calls a function which acquires and releases pf->dplls.lock β so yeah, there's locking happening in there, it's giving responsible adult, it's giving thread-safe icon π just know the lock comes and goes and that's not your problem, it's hers.
β RETURN β
0β success π (slay)- negative β error π (not slay, but she tried)
π SEE ALSO π
bestie. she has SO many friends. this is her whole contact list and I'm not cutting a single one, because every single one of these is part of the family ok π
Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, enum ice_dpll_pin_type(9), and:
ice_dpll_is_sw_pin(9)ice_dpll_is_reset(9)ice_dpll_pin_freq_set(9)ice_dpll_frequency_set(9)ice_dpll_input_frequency_set(9)ice_dpll_output_frequency_set(9)ice_dpll_frequency_get(9)ice_dpll_input_frequency_get(9)ice_dpll_output_frequency_get(9)ice_dpll_sw_pin_frequency_set(9)ice_dpll_sw_pin_frequency_get(9)ice_dpll_pin_enable(9)ice_dpll_pin_disable(9)ice_dpll_pin_store_state(9)ice_dpll_rclk_update_e825c(9)ice_dpll_rclk_update(9)ice_dpll_sw_pins_update(9)ice_dpll_pin_state_update(9)ice_dpll_hw_input_prio_set(9)ice_dpll_lock_status_get(9)ice_dpll_mode_get(9)ice_dpll_phase_offset_monitor_set(9)ice_dpll_phase_offset_monitor_get(9)ice_dpll_pin_state_set(9)ice_dpll_output_state_set(9)ice_dpll_input_state_set(9)ice_dpll_pin_state_get(9)ice_dpll_output_state_get(9)ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9)ice_dpll_sma_direction_set(9)ice_dpll_ufl_pin_state_set(9)ice_dpll_sw_pin_state_get(9)ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9)ice_dpll_input_prio_set(9)ice_dpll_input_direction(9)ice_dpll_output_direction(9)ice_dpll_pin_sma_direction_set(9)ice_dpll_pin_sw_direction_get(9)ice_dpll_pin_phase_adjust_get(9)ice_dpll_pin_phase_adjust_set(9)ice_dpll_input_phase_adjust_set(9)ice_dpll_output_phase_adjust_set(9)ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9)ice_dpll_synce_update_e825c(9)ice_dpll_output_esync_set(9)ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9)ice_dpll_input_esync_get(9)ice_dpll_sw_esync_set(9)ice_dpll_sw_esync_get(9)ice_dpll_input_ref_sync_get(9)ice_dpll_sw_input_ref_sync_get(9)ice_dpll_rclk_state_on_pin_set(9)ice_dpll_rclk_state_on_pin_get(9)ice_dpll_txclk_work(9)ice_dpll_txclk_state_on_dpll_set(9)ice_dpll_txclk_state_on_dpll_get(9)ice_generate_clock_id(9)ice_dpll_pin_ntf(9)ice_dpll_notify_changes(9)ice_dpll_is_pps_phase_monitor(9)ice_dpll_pins_notify_mask(9)ice_dpll_pps_update_phase_offsets(9)ice_dpll_update_state(9)ice_dpll_periodic_work(9)ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9)ice_dpll_get_pins(9)ice_dpll_unregister_pins(9)ice_dpll_pin_ref_sync_register(9)ice_dpll_register_pins(9)ice_dpll_deinit_direct_pins(9)ice_dpll_init_direct_pins(9)ice_dpll_deinit_rclk_pin(9)ice_dpll_init_pin_common(9)ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9)ice_dpll_init_fwnode_pins(9)ice_dpll_init_pins_e825(9)ice_dpll_init_pins(9)ice_dpll_deinit_dpll(9)ice_dpll_init_dpll(9)ice_dpll_deinit_worker(9)ice_dpll_init_worker(9)ice_dpll_phase_range_set(9)ice_dpll_init_info_pins_generic(9)ice_dpll_init_info_direct_pins(9)ice_dpll_init_info_pin_on_pin_e825c(9)ice_dpll_init_info_rclk_pin(9)ice_dpll_init_info_sw_pins(9)ice_dpll_init_info_txclk_pins_e825c(9)ice_dpll_init_pins_info(9)ice_dpll_deinit_info(9)ice_dpll_init_info_e825c(9)ice_dpll_init_info(9)ice_dpll_deinit(9)ice_dpll_init_e825(9)ice_dpll_init_e810(9)
like I said. huge friend group. she's not texting them all back, bestie π«Ά
ok and before I forget β the source/version juiciness and the date live in./drivers/net/ethernet/intel/ice, and it's dated October 2026, and yes the page title is literallyice_dpll_sw_...e_adjust_get(9)(the truncated version, she goes by a nickname, iykyk π). mwah, love u, go readice_dpll.cπβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms