ice_dpll_out...e_adjust_set(9)
π ice_dpll_output_phase_adjust_set β a Kernel API Manual moment β¨
okay so bestie, welcome to the <pink>Kernel API Manual</pink> β yes the whole manual, and today's main character is a callback with an absolutely iconic long name that got cut off in the header: ice_dpll_output_phase_adjust_set. she's giving "my name is long and I know it" energy and honestly? slay.
πΈ NAME πΈ
ice_dpll_output_phase_adjust_set β the callback for set output pin phase adjust π
β¨ SYNOPSIS β¨
int ice_dpll_output_phase_adjust_set (const struct dpll_pin *pin , void
*pin_priv , const struct dpll_device *dpll , void *dpll_priv , s32
phase_adjust , struct netlink_ext_ack *extack );
like, look at her. six arguments, zero fear. π₯
π«Ά ARGUMENTS π«Ά
pinβ pointer to a pin π§ (yes, that's the whole description, she's lowkey mysterious)pin_privβ the private data pointer that got passed on pin registrationdpllβ the registered dpll pointerdpll_privβ the private data pointer that got passed on dpll registrationphase_adjustβ thephase_adjustthat's to be set, ok so it does what it says on the tin πextackβ error reporting, the messenger bestie π¨
π DESCRIPTION π
so this is a Dpll subsystem callback. no cap. what she does is wrap a handler for setting phase adjust on an output pin π¦
that's it, that's the vibe. short and iconic. periodt.
π CONTEXT π
ngl this one matters: she calls a function which acquires pf->dplls.lock π so like, mind the lock, bestie.
π RETURN π
0β success π (we love to see it)- negative β error π (not the vibe, but it happens)
π SEE ALSO π
okay so this list is long β like, the way this list goes on. it's giving "everyone showed up to the party" energy. all of these live in the kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c + friends. here they are, absolutely all of them, in order, no cap:
enum ice_dpll_pin_type(9)ice_dpll_is_sw_pin(9)ice_dpll_is_reset(9)ice_dpll_pin_freq_set(9)ice_dpll_frequency_set(9)ice_dpll_input_frequency_set(9)ice_dpll_output_frequency_set(9)ice_dpll_frequency_get(9)ice_dpll_input_frequency_get(9)ice_dpll_output_frequency_get(9)ice_dpll_sw_pin_frequency_set(9)ice_dpll_sw_pin_frequency_get(9)ice_dpll_pin_enable(9)ice_dpll_pin_disable(9)ice_dpll_pin_store_state(9)ice_dpll_rclk_update_e825c(9)ice_dpll_rclk_update(9)ice_dpll_sw_pins_update(9)ice_dpll_pin_state_update(9)ice_dpll_hw_input_prio_set(9)ice_dpll_lock_status_get(9)ice_dpll_mode_get(9)ice_dpll_phase_offset_monitor_set(9)ice_dpll_phase_offset_monitor_get(9)ice_dpll_pin_state_set(9)ice_dpll_output_state_set(9)ice_dpll_input_state_set(9)ice_dpll_pin_state_get(9)ice_dpll_output_state_get(9)ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9)ice_dpll_sma_direction_set(9)ice_dpll_ufl_pin_state_set(9)ice_dpll_sw_pin_state_get(9)ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9)ice_dpll_input_prio_set(9)ice_dpll_input_direction(9)ice_dpll_output_direction(9)ice_dpll_pin_sma_direction_set(9)ice_dpll_pin_sw_direction_get(9)ice_dpll_pin_phase_adjust_get(9)ice_dpll_pin_phase_adjust_set(9)ice_dpll_input_phase_adjust_set(9)ice_dpll_sw_phase_adjust_get(9)ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9)ice_dpll_synce_update_e825c(9)ice_dpll_output_esync_set(9)ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9)ice_dpll_input_esync_get(9)ice_dpll_sw_esync_set(9)ice_dpll_sw_esync_get(9)ice_dpll_input_ref_sync_get(9)ice_dpll_sw_input_ref_sync_get(9)ice_dpll_rclk_state_on_pin_set(9)ice_dpll_rclk_state_on_pin_get(9)ice_dpll_txclk_work(9)ice_dpll_txclk_state_on_dpll_set(9)ice_dpll_txclk_state_on_dpll_get(9)ice_generate_clock_id(9)ice_dpll_pin_ntf(9)ice_dpll_notify_changes(9)ice_dpll_is_pps_phase_monitor(9)ice_dpll_pins_notify_mask(9)ice_dpll_pps_update_phase_offsets(9)ice_dpll_update_state(9)ice_dpll_periodic_work(9)ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9)ice_dpll_get_pins(9)ice_dpll_unregister_pins(9)ice_dpll_pin_ref_sync_register(9)ice_dpll_register_pins(9)ice_dpll_deinit_direct_pins(9)ice_dpll_init_direct_pins(9)ice_dpll_deinit_rclk_pin(9)ice_dpll_init_pin_common(9)ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9)ice_dpll_init_fwnode_pins(9)ice_dpll_init_pins_e825(9)ice_dpll_init_pins(9)ice_dpll_deinit_dpll(9)ice_dpll_init_dpll(9)ice_dpll_deinit_worker(9)ice_dpll_init_worker(9)ice_dpll_phase_range_set(9)ice_dpll_init_info_pins_generic(9)ice_dpll_init_info_direct_pins(9)ice_dpll_init_info_pin_on_pin_e825c(9)ice_dpll_init_info_rclk_pin(9)ice_dpll_init_info_sw_pins(9)ice_dpll_init_info_txclk_pins_e825c(9)ice_dpll_init_pins_info(9)ice_dpll_deinit_info(9)ice_dpll_init_info_e825c(9)ice_dpll_init_info(9)ice_dpll_deinit(9)ice_dpll_init_e825(9)ice_dpll_init_e810(9)
and that's the whole page, bestie π«Ά if you ever need the receipts: this one lives over at ./drivers/net/ethernet/intel/ice, and the manual is dated October 2026, shiny and fresh β ice_dpll_output_phase_adjust_set(9) forever, no cap π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms