ice_dpll_init_e825(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸŽ€ ice_dpll_init_e825(9) πŸŽ€

okay so this one comes straight out of the Kernel API Manual, and it's literally the moment the dpll subsystem gets its whole setup together on this board β€” bestie, it's giving origin story πŸ’–


✨ NAME ✨

ice_dpll_init_e825 β€” initialize support for dpll subsystem

🌸 SYNOPSIS 🌸

void ice_dpll_init_e825 (struct ice_pf *pf );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • pf β€” the board private structure, aka the main character's personal data 🫢

πŸ’… DESCRIPTION πŸ’…

So what does it actually do? It sets up the device dplls, registers them and the pins connected within the Linux dpll subsystem. That registration is the whole point, because it's what lets userspace peek at the state of the DPLL and handle DPLL configuration requests. No cap β€” it's the bridge between the hardware vibes and the userspace asking "hey, what's up?" 🌈

πŸ”₯ CONTEXT πŸ”₯

It initializes the pf->dplls.lock mutex. That's the lock, bestie β€” treat it with respect 😌

πŸ‘‘ SEE ALSO πŸ‘‘

The star of the file show is ./drivers/net/ethernet/intel/ice/ice_dpll.c, and the enum ice_dpll_pin_type(9) is obviously in the group chat too. The rest of the squad, in order because we're not chaotic:

ice_dpll_pin_type(9), ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9), ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9), ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9), ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9), ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9), ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9), ice_dpll_pin_disable(9), ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9), ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9), ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9), ice_dpll_output_state_set(9), ice_dpll_input_state_set(9), ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9), ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9), ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9), ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9), ice_dpll_input_prio_set(9), ice_dpll_input_direction(9), ice_dpll_output_direction(9), ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9), ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9), ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9), ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9), ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9), ice_dpll_txclk_state_on_dpll_set(9), ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9), ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9), ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9), ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9), ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9), ice_dpll_release_pins(9), ice_dpll_get_pins(9), ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9), ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9), ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9), ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9), ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9), ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9), ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9), ice_dpll_deinit_worker(9), ice_dpll_init_worker(9), ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9), ice_dpll_init_info_direct_pins(9), ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9), ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9), ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9), ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9), ice_dpll_init_e810(9).


and that's the whole page, bestie β€” source drop is ./drivers/net/ethernet/intel/ice, dated October 2026, and it's signed by the manual itself: ice_dpll_init_e825(9). periodt πŸ’œ

πŸ“¦ where this page comes from