ice_dpll_txc..._on_dpll_get(9)
๐ ice_dpll_txc..._on_dpll_get(9) โ Kernel API Manual, bestie edition ๐
๐ธ NAME
ice_dpll_txclk_state_on_dpll_get โ get a state of Tx clk reference pin. That's the whole assignment, no cap. ๐
โจ SYNOPSIS
int ice_dpll_txclk_state_on_dpll_get (const struct dpll_pin *pin , void
*pin_priv , const struct dpll_device *dpll , void *dpll_priv , enum
dpll_pin_state *state , struct netlink_ext_ack *extack );
๐ซถ ARGUMENTS
pinโ pointer to a pin ๐pin_privโ private data pointer passed on pin registrationdpllโ registered dpll pointerdpll_privโ private data pointer passed on dpll registrationstateโ on success holds pin state on parent pinextackโ error reporting
๐ DESCRIPTION
Okay so the tea: the TXCLK DPLL pin state is derived and not stored explicitly. It's giving calculated-on-the-spot energy, not saved-in-a-locker energy. ๐งฎโจ
Only external TX reference clocks (SYNCE, EREF0) are modeled as DPLL pins. The internal ENET (TXCO) clock has no pin and, when selected, all TXCLK pins are reported DISCONNECTED. So when ENET is the moment, the TXCLK pin lineup says DISCONNECTED. ๐ซฅ
During a pending TXCLK switch, the requested pin may be reported as CONNECTED before hardware verification. That's the fine-print caveat, bestie โ hardware acceptance and synchronization are reported exclusively via TXC DPLL lock-status. ๐๐
๐ CONTEXT
Acquires and releases pf->dplls.lock. Lock behavior: handled. ๐
๐ฏ RETURN
0โ success- negative โ failure
๐ SEE ALSO
The whole link-up, and yes every single one made the list ๐
- Kernel file:
./drivers/net/ethernet/intel/ice/ice_dpll.cโ andenum ice_dpll_pin_type(9)too. ice_dpll_is_sw_pin(9),ice_dpll_is_reset(9),ice_dpll_pin_freq_set(9),ice_dpll_frequency_set(9),ice_dpll_input_frequency_set(9),ice_dpll_output_frequency_set(9),ice_dpll_frequency_get(9),ice_dpll_input_frequency_get(9),ice_dpll_output_frequency_get(9),ice_dpll_sw_pin_frequency_set(9),ice_dpll_sw_pin_frequency_get(9)ice_dpll_pin_enable(9),ice_dpll_pin_disable(9),ice_dpll_pin_store_state(9),ice_dpll_rclk_update_e825c(9),ice_dpll_rclk_update(9),ice_dpll_sw_pins_update(9),ice_dpll_pin_state_update(9),ice_dpll_hw_input_prio_set(9),ice_dpll_lock_status_get(9),ice_dpll_mode_get(9),ice_dpll_phase_offset_monitor_set(9),ice_dpll_phase_offset_monitor_get(9)ice_dpll_pin_state_set(9),ice_dpll_output_state_set(9),ice_dpll_input_state_set(9),ice_dpll_pin_state_get(9),ice_dpll_output_state_get(9),ice_dpll_input_state_get(9),ice_dpll_sw_pin_notify_peer(9),ice_dpll_sma_direction_set(9),ice_dpll_ufl_pin_state_set(9),ice_dpll_sw_pin_state_get(9),ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9),ice_dpll_input_prio_set(9),ice_dpll_input_direction(9),ice_dpll_output_direction(9),ice_dpll_pin_sma_direction_set(9),ice_dpll_pin_sw_direction_get(9),ice_dpll_pin_phase_adjust_get(9),ice_dpll_pin_phase_adjust_set(9),ice_dpll_input_phase_adjust_set(9),ice_dpll_output_phase_adjust_set(9),ice_dpll_sw_phase_adjust_get(9),ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9),ice_dpll_synce_update_e825c(9),ice_dpll_output_esync_set(9),ice_dpll_output_esync_get(9),ice_dpll_input_esync_set(9),ice_dpll_input_esync_get(9),ice_dpll_sw_esync_set(9),ice_dpll_sw_esync_get(9),ice_dpll_input_ref_sync_get(9),ice_dpll_sw_input_ref_sync_get(9)ice_dpll_rclk_state_on_pin_set(9),ice_dpll_rclk_state_on_pin_get(9),ice_dpll_txclk_work(9),ice_dpll_txclk_state_on_dpll_set(9),ice_generate_clock_id(9),ice_dpll_pin_ntf(9),ice_dpll_notify_changes(9),ice_dpll_is_pps_phase_monitor(9),ice_dpll_pins_notify_mask(9),ice_dpll_pps_update_phase_offsets(9)ice_dpll_update_state(9),ice_dpll_periodic_work(9),ice_dpll_init_ref_sync_inputs(9),ice_dpll_release_pins(9),ice_dpll_get_pins(9),ice_dpll_unregister_pins(9),ice_dpll_pin_ref_sync_register(9),ice_dpll_register_pins(9),ice_dpll_deinit_direct_pins(9),ice_dpll_init_direct_pins(9),ice_dpll_deinit_rclk_pin(9)ice_dpll_init_pin_common(9),ice_dpll_init_rclk_pin(9),ice_dpll_deinit_pins(9),ice_dpll_init_fwnode_pins(9),ice_dpll_init_pins_e825(9),ice_dpll_init_pins(9),ice_dpll_deinit_dpll(9),ice_dpll_init_dpll(9),ice_dpll_deinit_worker(9),ice_dpll_init_worker(9),ice_dpll_phase_range_set(9)ice_dpll_init_info_pins_generic(9),ice_dpll_init_info_direct_pins(9),ice_dpll_init_info_pin_on_pin_e825c(9),ice_dpll_init_info_rclk_pin(9),ice_dpll_init_info_sw_pins(9),ice_dpll_init_info_txclk_pins_e825c(9),ice_dpll_init_pins_info(9),ice_dpll_deinit_info(9),ice_dpll_init_info_e825c(9),ice_dpll_init_info(9),ice_dpll_deinit(9)ice_dpll_init_e825(9),ice_dpll_init_e810(9)
Sign-off szn, bestie: source/version ./drivers/net/ethernet/intel/ice, dated October 2026, page tag ice_dpll_txc..._on_dpll_get(9) โ byeeeeee ๐๐ฆ
๐ฆ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- ๐ girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms