ice_dpll_in...pins_generic(9)
π
ice_dpll_init_info_pins_generic β straight outta the Kernel API Manual
okay so bestie, we're reading page ice_dpll_in...pins_generic(9) today and honestly? it's a little guy but it's doing a LOT for the Intel ice driver. let's get into it π
β¨ NAME β¨
ice_dpll_init_info_pins_generic β initializes generic pins info π
like, that's the whole job. it initializes. the pins info. the generic one. slay.
πΈ SYNOPSIS πΈ
int ice_dpll_init_info_pins_generic (struct ice_pf *pf , bool input );
three words: int. returning. things. π
π¦ ARGUMENTS π¦
pfβ the board private structure π your PF. the whole vibe. the main character.inputβ if input pins initialized β this lilboolis just here to tell you whether we're talking about the input pins being initialized. that's it. that's the flag.
π₯ DESCRIPTION π₯
okay so here's the tea π β this function inits information for generic pins, and then it caches them in PF's pins structures. so all that pin info? it gets remembered, tucked away in the PF's own structures, no cap. lowkey iconic of it.
that's the whole description fr fr. sometimes the lore is just "it does the thing and it remembers the thing." periodt. π
π RETURN π
0β success π (we love to see it, this is the good ending)- negative β init failure reason π (the bad ending β a negative value, and it's the reason the init failed. read it, it's trying to tell you something)
heads up bestie: a negative return is a failure reason, so don't just check for "not zero" and move on like it's a vibe check β the actual number is the info. π«Ά
π SEE ALSO π
okay so this is the part where the manpage just drops the entire extended universe on you. like genuinely, grab a snack, this is a whole friendship group π§:
Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, enumice_dpll_pin_type(9),ice_dpll_is_sw_pin(9),ice_dpll_is_reset(9)ice_dpll_pin_freq_set(9),ice_dpll_frequency_set(9),ice_dpll_input_frequency_set(9),ice_dpll_output_frequency_set(9),ice_dpll_frequency_get(9)ice_dpll_input_frequency_get(9),ice_dpll_output_frequency_get(9),ice_dpll_sw_pin_frequency_set(9),ice_dpll_sw_pin_frequency_get(9)ice_dpll_pin_enable(9),ice_dpll_pin_disable(9),ice_dpll_pin_store_state(9),ice_dpll_rclk_update_e825c(9),ice_dpll_rclk_update(9)ice_dpll_sw_pins_update(9),ice_dpll_pin_state_update(9),ice_dpll_hw_input_prio_set(9),ice_dpll_lock_status_get(9),ice_dpll_mode_get(9)ice_dpll_phase_offset_monitor_set(9),ice_dpll_phase_offset_monitor_get(9),ice_dpll_pin_state_set(9),ice_dpll_output_state_set(9)ice_dpll_input_state_set(9),ice_dpll_pin_state_get(9),ice_dpll_output_state_get(9),ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9),ice_dpll_sma_direction_set(9),ice_dpll_ufl_pin_state_set(9),ice_dpll_sw_pin_state_get(9),ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9),ice_dpll_input_prio_set(9),ice_dpll_input_direction(9),ice_dpll_output_direction(9)ice_dpll_pin_sma_direction_set(9),ice_dpll_pin_sw_direction_get(9),ice_dpll_pin_phase_adjust_get(9),ice_dpll_pin_phase_adjust_set(9)ice_dpll_input_phase_adjust_set(9),ice_dpll_output_phase_adjust_set(9),ice_dpll_sw_phase_adjust_get(9),ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9),ice_dpll_synce_update_e825c(9),ice_dpll_output_esync_set(9),ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9),ice_dpll_input_esync_get(9),ice_dpll_sw_esync_set(9),ice_dpll_sw_esync_get(9)ice_dpll_input_ref_sync_get(9),ice_dpll_sw_input_ref_sync_get(9),ice_dpll_rclk_state_on_pin_set(9),ice_dpll_rclk_state_on_pin_get(9)ice_dpll_txclk_work(9),ice_dpll_txclk_state_on_dpll_set(9),ice_dpll_txclk_state_on_dpll_get(9),ice_generate_clock_id(9)ice_dpll_pin_ntf(9),ice_dpll_notify_changes(9),ice_dpll_is_pps_phase_monitor(9),ice_dpll_pins_notify_mask(9)ice_dpll_pps_update_phase_offsets(9),ice_dpll_update_state(9),ice_dpll_periodic_work(9),ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9),ice_dpll_get_pins(9),ice_dpll_unregister_pins(9),ice_dpll_pin_ref_sync_register(9),ice_dpll_register_pins(9)ice_dpll_deinit_direct_pins(9),ice_dpll_init_direct_pins(9),ice_dpll_deinit_rclk_pin(9),ice_dpll_init_pin_common(9),ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9),ice_dpll_init_fwnode_pins(9),ice_dpll_init_pins_e825(9),ice_dpll_init_pins(9)ice_dpll_deinit_dpll(9),ice_dpll_init_dpll(9),ice_dpll_deinit_worker(9),ice_dpll_init_worker(9)ice_dpll_phase_range_set(9),ice_dpll_init_info_direct_pins(9),ice_dpll_init_info_pin_on_pin_e825c(9),ice_dpll_init_info_rclk_pin(9)ice_dpll_init_info_sw_pins(9),ice_dpll_init_info_txclk_pins_e825c(9),ice_dpll_init_pins_info(9),ice_dpll_deinit_info(9)ice_dpll_init_info_e825c(9),ice_dpll_init_info(9),ice_dpll_deinit(9),ice_dpll_init_e825(9),ice_dpll_init_e810(9)
see? whole extended universe. iykyk π¦
and that's the page bestie!! π it lives over in ./drivers/net/ethernet/intel/ice, dated October 2026 β so mark your calendar, screenshot it, send it to the group chat, and go init some generic pins πβ¨π«Ά
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms