ice_dpll_sw_esync_get(9)
π ice_dpll_sw_esync_get(9) β like, the Kernel API Manual, but make it make sense π
okay bestie, gather round, because we're about to talk about a kernel callback from the Kernel API Manual and honestly? she's lowkey iconic. this is ice_dpll_sw_esync_get(9) and she does exactly one thing but she does it well. β¨
πΈ NAME πΈ
ice_dpll_sw_esync_get β the callback that gets the embedded sync on the SW pin. that's it. that's the whole vibe. π¦
π«Ά SYNOPSIS π«Ά
int ice_dpll_sw_esync_get (const struct dpll_pin *pin , void *pin_priv ,
const struct dpll_device *dpll , void *dpll_priv , struct dpll_pin_esync
*esync , struct netlink_ext_ack *extack );
like, yes, that's a lot of arguments. we don't gatekeep. π
β¨ ARGUMENTS β¨
pinβ pointer to a pin π she's the main character herepin_privβ the private data pointer that got passed along when the pin was registereddpllβ the registered dpll pointer, aka the one that's already in the systemdpll_privβ private data pointer passed on dpll registration, same energy aspin_privbut for the dpllesyncβ on success, this one holds the embedded sync frequency and its properties. bestie comes through with the goods π₯extackβ for the error reporting, because sometimes things go wrong and we need receipts
π DESCRIPTION π
so this is a Dpll subsystem callback. it's literally the handler for getting the embedded sync frequency value of the SW pin. no cap, that's the whole job description. she shows up, she gets the frequency value, she leaves. π
π§ CONTEXT π§
she calls a function which acquires and releases pf->dplls.lock. so yeah, there's a lock in play β just so you know what she's doing while you're out here living your life. π
β RETURN β
0β success π slay- negative β error π it's giving "not today"
π¦ SEE ALSO π¦
okay this section is long β the ice dpll family is huge and everyone's invited to the group chat. no one gets left out. π
- the Kernel file
./drivers/net/ethernet/intel/ice/ice_dpll.c enum ice_dpll_pin_type(9)ice_dpll_is_sw_pin(9)ice_dpll_is_reset(9)ice_dpll_pin_freq_set(9)ice_dpll_frequency_set(9)ice_dpll_input_frequency_set(9)ice_dpll_output_frequency_set(9)ice_dpll_frequency_get(9)ice_dpll_input_frequency_get(9)ice_dpll_output_frequency_get(9)ice_dpll_sw_pin_frequency_set(9)ice_dpll_sw_pin_frequency_get(9)ice_dpll_pin_enable(9)ice_dpll_pin_disable(9)ice_dpll_pin_store_state(9)ice_dpll_rclk_update_e825c(9)ice_dpll_rclk_update(9)ice_dpll_sw_pins_update(9)ice_dpll_pin_state_update(9)ice_dpll_hw_input_prio_set(9)ice_dpll_lock_status_get(9)ice_dpll_mode_get(9)ice_dpll_phase_offset_monitor_set(9)ice_dpll_phase_offset_monitor_get(9)ice_dpll_pin_state_set(9)ice_dpll_output_state_set(9)ice_dpll_input_state_set(9)ice_dpll_pin_state_get(9)ice_dpll_output_state_get(9)ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9)ice_dpll_sma_direction_set(9)ice_dpll_ufl_pin_state_set(9)ice_dpll_sw_pin_state_get(9)ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9)ice_dpll_input_prio_set(9)ice_dpll_input_direction(9)ice_dpll_output_direction(9)ice_dpll_pin_sma_direction_set(9)ice_dpll_pin_sw_direction_get(9)ice_dpll_pin_phase_adjust_get(9)ice_dpll_pin_phase_adjust_set(9)ice_dpll_input_phase_adjust_set(9)ice_dpll_output_phase_adjust_set(9)ice_dpll_sw_phase_adjust_get(9)ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9)ice_dpll_synce_update_e825c(9)ice_dpll_output_esync_set(9)ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9)ice_dpll_input_esync_get(9)ice_dpll_sw_esync_set(9)ice_dpll_input_ref_sync_get(9)ice_dpll_sw_input_ref_sync_get(9)ice_dpll_rclk_state_on_pin_set(9)ice_dpll_rclk_state_on_pin_get(9)ice_dpll_txclk_work(9)ice_dpll_txclk_state_on_dpll_set(9)ice_dpll_txclk_state_on_dpll_get(9)ice_generate_clock_id(9)ice_dpll_pin_ntf(9)ice_dpll_notify_changes(9)ice_dpll_is_pps_phase_monitor(9)ice_dpll_pins_notify_mask(9)ice_dpll_pps_update_phase_offsets(9)ice_dpll_update_state(9)ice_dpll_periodic_work(9)ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9)ice_dpll_get_pins(9)ice_dpll_unregister_pins(9)ice_dpll_pin_ref_sync_register(9)ice_dpll_register_pins(9)ice_dpll_deinit_direct_pins(9)ice_dpll_init_direct_pins(9)ice_dpll_deinit_rclk_pin(9)ice_dpll_init_pin_common(9)ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9)ice_dpll_init_fwnode_pins(9)ice_dpll_init_pins_e825(9)ice_dpll_init_pins(9)ice_dpll_deinit_dpll(9)ice_dpll_init_dpll(9)ice_dpll_deinit_worker(9)ice_dpll_init_worker(9)ice_dpll_phase_range_set(9)ice_dpll_init_info_pins_generic(9)ice_dpll_init_info_direct_pins(9)ice_dpll_init_info_pin_on_pin_e825c(9)ice_dpll_init_info_rclk_pin(9)ice_dpll_init_info_sw_pins(9)ice_dpll_init_info_txclk_pins_e825c(9)ice_dpll_init_pins_info(9)ice_dpll_deinit_info(9)ice_dpll_init_info_e825c(9)ice_dpll_init_info(9)ice_dpll_deinit(9)ice_dpll_init_e825(9)ice_dpll_init_e810(9)
okay that's the whole page, you ate that fr fr π β¨
and finally, the little sign-off: this iconic piece of documentation lives over at ./drivers/net/ethernet/intel/ice, and she's dated October 2026. periodt. ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms