ice_dpll_synce_update_e825c(9)
π ice_dpll_synce_update_e825c(9) π
okay bestie, this is straight out of the Kernel API Manual, section 9, and itβs giving βtiny DPLL helper with a very specific job.β Itβs literally ice_dpll_synce_update_e825c β setting PHY recovered clock pins on e825c. π
β¨ NAME β¨
ice_dpll_synce_update_e825c β setting PHY recovered clock pins on e825c. Thatβs the whole name, no cap. π¦
πΈ SYNOPSIS πΈ
int ice_dpll_synce_update_e825c (struct ice_hw *hw , bool ena , u32 port_num , enum ice_synce_clk output );
π ARGUMENTS π
hwβ Pointer to the HW struct. Thatβs the hardware bestie, obviously. π«Άenaβtrueif enable,falsein disable. Yes, thatβs exactly the wording, keep it moving. β¨port_numβ port number. Just the port number. πoutputβ output pin; we have two in E825C. Two pins, iconic behavior. π
π¦ DESCRIPTION π¦
DPLL subsystem callback. Set proper signals to recover clock from port.
Thatβs the whole vibe: itβs the callback that sets the proper signals so the clock can be recovered from the port. Lowkey important, highkey specific. π
π CONTEXT π
Called under pf->dplls.lock. So yeah, bestie, this is the lock-held context β respect the lock. πβ¨
π₯ RETURN π₯
0β success β¨- negative β error π
π SEE ALSO π
the whole squad lives in the kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, and the guest list is huge. No skipping, iykyk:
enum ice_dpll_pin_type(9),ice_dpll_is_sw_pin(9),ice_dpll_is_reset(9),ice_dpll_pin_freq_set(9),ice_dpll_frequency_set(9),ice_dpll_input_frequency_set(9),ice_dpll_output_frequency_set(9),ice_dpll_frequency_get(9),ice_dpll_input_frequency_get(9),ice_dpll_output_frequency_get(9)ice_dpll_sw_pin_frequency_set(9),ice_dpll_sw_pin_frequency_get(9),ice_dpll_pin_enable(9),ice_dpll_pin_disable(9),ice_dpll_pin_store_state(9),ice_dpll_rclk_update_e825c(9),ice_dpll_rclk_update(9),ice_dpll_sw_pins_update(9),ice_dpll_pin_state_update(9),ice_dpll_hw_input_prio_set(9)ice_dpll_lock_status_get(9),ice_dpll_mode_get(9),ice_dpll_phase_offset_monitor_set(9),ice_dpll_phase_offset_monitor_get(9),ice_dpll_pin_state_set(9),ice_dpll_output_state_set(9),ice_dpll_input_state_set(9),ice_dpll_pin_state_get(9),ice_dpll_output_state_get(9),ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9),ice_dpll_sma_direction_set(9),ice_dpll_ufl_pin_state_set(9),ice_dpll_sw_pin_state_get(9),ice_dpll_sma_pin_state_set(9),ice_dpll_input_prio_get(9),ice_dpll_input_prio_set(9),ice_dpll_input_direction(9),ice_dpll_output_direction(9),ice_dpll_pin_sma_direction_set(9)ice_dpll_pin_sw_direction_get(9),ice_dpll_pin_phase_adjust_get(9),ice_dpll_pin_phase_adjust_set(9),ice_dpll_input_phase_adjust_set(9),ice_dpll_output_phase_adjust_set(9),ice_dpll_sw_phase_adjust_get(9),ice_dpll_sw_phase_adjust_set(9),ice_dpll_phase_offset_get(9),ice_dpll_output_esync_set(9),ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9),ice_dpll_input_esync_get(9),ice_dpll_sw_esync_set(9),ice_dpll_sw_esync_get(9),ice_dpll_input_ref_sync_get(9),ice_dpll_sw_input_ref_sync_get(9),ice_dpll_rclk_state_on_pin_set(9),ice_dpll_rclk_state_on_pin_get(9),ice_dpll_txclk_work(9),ice_dpll_txclk_state_on_dpll_set(9)ice_dpll_txclk_state_on_dpll_get(9),ice_generate_clock_id(9),ice_dpll_pin_ntf(9),ice_dpll_notify_changes(9),ice_dpll_is_pps_phase_monitor(9),ice_dpll_pins_notify_mask(9),ice_dpll_pps_update_phase_offsets(9),ice_dpll_update_state(9),ice_dpll_periodic_work(9),ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9),ice_dpll_get_pins(9),ice_dpll_unregister_pins(9),ice_dpll_pin_ref_sync_register(9),ice_dpll_register_pins(9),ice_dpll_deinit_direct_pins(9),ice_dpll_init_direct_pins(9),ice_dpll_deinit_rclk_pin(9),ice_dpll_init_pin_common(9),ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9),ice_dpll_init_fwnode_pins(9),ice_dpll_init_pins_e825(9),ice_dpll_init_pins(9),ice_dpll_deinit_dpll(9),ice_dpll_init_dpll(9),ice_dpll_deinit_worker(9),ice_dpll_init_worker(9),ice_dpll_phase_range_set(9),ice_dpll_init_info_pins_generic(9)ice_dpll_init_info_direct_pins(9),ice_dpll_init_info_pin_on_pin_e825c(9),ice_dpll_init_info_rclk_pin(9),ice_dpll_init_info_sw_pins(9),ice_dpll_init_info_txclk_pins_e825c(9),ice_dpll_init_pins_info(9),ice_dpll_deinit_info(9),ice_dpll_init_info_e825c(9),ice_dpll_init_info(9),ice_dpll_deinit(9)ice_dpll_init_e825(9),ice_dpll_init_e810(9)
π signed off from the source at ./drivers/net/ethernet/intel/ice, version/date: October 2026 β now go slay those recovered clock pins, bestie! Periodt. π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms