ice_dpll_pins_notify_mask(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

ice_dpll_pins_notify_mask(9) β€” notify dpll subsystem about bulk pin changes

Okay bestie, this is from the Kernel API Manual, and the whole vibe is: tell the dpll subsystem when a bunch of pins changed, all at once. πŸ’…


🌸 SYNOPSIS 🌸

void ice_dpll_pins_notify_mask (struct ice_dplls *dplls , struct ice_dpll_pin *pins , u8 pin_num , u32 phase_offset_ntf_mask );

πŸŽ€ ARGUMENTS πŸŽ€

  • dplls β€” pointer to dplls struct. Literally just a pointer to the dplls struct, no cap. 🫢
  • pins β€” array of ice_dpll_pin pointers registered within dpll subsystem. It's giving "the whole squad, already checked in." ✨
  • pin_num β€” number of pins. Bestie, this is how many pins we're dealing with. πŸ”’
  • phase_offset_ntf_mask β€” bitmask of pin indexes to notify. Think of it as the "who gets the notification" list, but in bitmask form. 🎯

πŸ¦‹ DESCRIPTION πŸ¦‹

So here's the tea: this function iterates over the array of pins and calls the dpll subsystem's pin notify if the corresponding pin index within the bitmask is set. That's it. That's the whole slay. πŸ’–

No guessing, no extra lore β€” just loop through the pins, check the bitmask, and notify the ones whose index is set. Iconic behavior, honestly. πŸ‘‘


πŸ”₯ CONTEXT πŸ”₯

Must be called while pf->dplls.lock is released.

⚠️ Fr fr, keep that lock released. The manual says it must be called while pf->dplls.lock is released, and we are not out here improvising. 😭

🌈 SEE ALSO 🌈

Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c

enum ice_dpll_pin_type(9), ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9), ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9), ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9), ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9), ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9), ice_dpll_sw_pin_frequency_get(9)

ice_dpll_pin_enable(9), ice_dpll_pin_disable(9), ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9), ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9), ice_dpll_phase_offset_monitor_get(9)

ice_dpll_pin_state_set(9), ice_dpll_output_state_set(9), ice_dpll_input_state_set(9), ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9), ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9), ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9), ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9)

ice_dpll_input_prio_set(9), ice_dpll_input_direction(9), ice_dpll_output_direction(9), ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9), ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9)

ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9), ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9), ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9)

ice_dpll_txclk_state_on_dpll_set(9), ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9), ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9), ice_dpll_is_pps_phase_monitor(9), ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9), ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9), ice_dpll_release_pins(9), ice_dpll_get_pins(9)

ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9), ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9), ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9), ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9), ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9), ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9)

ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9), ice_dpll_deinit_worker(9), ice_dpll_init_worker(9), ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9), ice_dpll_init_info_direct_pins(9), ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9), ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9), ice_dpll_init_pins_info(9)

ice_dpll_deinit_info(9), ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9), ice_dpll_init_e825(9), ice_dpll_init_e810(9)


And that's the whole page, bestie β€” sourced from ./drivers/net/ethernet/intel/ice, dated October 2026, ice_dpll_pins_notify_mask(9) and all. Periodt. πŸ’œπŸŽ€

πŸ“¦ where this page comes from