ice_dpll_ou...requency_set(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… ice_dpll_output_frequency_set β€” like, the output pin callback for setting frequency ✨

okay so this is a page straight out of the Kernel API Manual (yes, that's the manual name, we're fancy here πŸŽ€) and it's about ice_dpll_output_frequency_set(9). Grab a snack, bestie, we're getting into it πŸ’–


🌸 NAME

ice_dpll_output_frequency_set β€” the output pin callback that handles set frequency. That's literally the whole vibe. It's the thing that gets called when someone wants a pin's frequency changed πŸ¦‹


✨ SYNOPSIS

int ice_dpll_output_frequency_set (const struct dpll_pin *pin , void
     *pin_priv , const struct dpll_device *dpll , void *dpll_priv , u64
     frequency , struct netlink_ext_ack *extack );

πŸ’œ ARGUMENTS

Six args, no skips, we love a full roster πŸ‘‘

  • pin β€” a pointer to a pin. yeah, that pin πŸŽ€
  • pin_priv β€” the private data pointer that got passed in when the pin was registered. it's giving "you left your stuff at my place" energy πŸ”₯
  • dpll β€” a pointer to the dpll ✨
  • dpll_priv β€” the private data pointer passed on dpll registration. matching set with pin_priv, iykyk 🫢
  • frequency β€” the frequency that's about to be set. like, u64, so it can go big πŸ’€
  • extack β€” error reporting. the little messenger that tells userspace what went wrong 😭

πŸ¦‹ DESCRIPTION

It wraps the internal set frequency command on a pin. That's it, that's the function β€” a cute little wrapper doing its one job and doing it well πŸ’…


🌈 CONTEXT

Heads up bestie: this calls a function which acquires pf->dplls.lock. so like, mind your locking manners, okay? πŸ”’

⭐ RETURN

  • 0 β€” success! slay, the frequency got set πŸŽ‰
  • negative β€” error: either the pin wasn't found, or it couldn't set it in hw. not iconic, but it happens 😭

πŸ‘‘ SEE ALSO

okay this list is long bestie, but we do not skip entries in this house. every single one, in order, no cap 🫑

Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c, plus: enum ice_dpll_pin_type(9), ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9), ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9), ice_dpll_input_frequency_set(9), ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9), ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9), ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9), ice_dpll_pin_disable(9), ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9), ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9), ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9), ice_dpll_lock_status_get(9), ice_dpll_mode_get(9), ice_dpll_phase_offset_monitor_set(9), ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9), ice_dpll_output_state_set(9), ice_dpll_input_state_set(9), ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9), ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9), ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9), ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9), ice_dpll_input_prio_get(9), ice_dpll_input_prio_set(9), ice_dpll_input_direction(9), ice_dpll_output_direction(9), ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9), ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9), ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9), ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9), ice_dpll_phase_offset_get(9), ice_dpll_synce_update_e825c(9), ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9), ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9), ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9), ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9), ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9), ice_dpll_txclk_work(9), ice_dpll_txclk_state_on_dpll_set(9), ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9), ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9), ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9), ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9), ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9), ice_dpll_release_pins(9), ice_dpll_get_pins(9), ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9), ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9), ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9), ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9), ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9), ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9), ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9), ice_dpll_deinit_worker(9), ice_dpll_init_worker(9), ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9), ice_dpll_init_info_direct_pins(9), ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9), ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9), ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9), ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9), ice_dpll_init_e825(9), ice_dpll_init_e810(9)


okay that's the whole page, you ate that bestie πŸ’…βœ¨

this little love letter lives in ./drivers/net/ethernet/intel/ice, dated October 2026 β€” go say hi to the source, it's literally right there πŸ«ΆπŸŽ€

πŸ“¦ where this page comes from