ice_dpll_sw...requency_get(9)
π NAME π
ice_dpll_sw_pin_frequency_get β the callback that goes and gets the frequency of a SW pin. Like, it fetches the number. That's the whole gig. π
So this page lives in the Kernel API Manual, bestie, and it's all about one little callback in the Intel ice driver's DPLL corner of the world. Let's get into it. β¨
πΈ SYNOPSIS πΈ
int ice_dpll_sw_pin_frequency_get (const struct dpll_pin *pin , void
*pin_priv , const struct dpll_device *dpll , void *dpll_priv , u64
*frequency , struct netlink_ext_ack *extack );
Six arguments, one int coming back out. No cap. π
π¦ ARGUMENTS π¦
Okay so every single one of these, in order, no skipping:
pinβ pointer to a pin. Just a pin. Hi pin. πpin_privβ the private data pointer that got passed on pin registration. It's the pin's lil secret stash. πdpllβ pointer to dpll. Yep. That one. π«dpll_privβ the private data pointer that got passed on dpll registration. Same vibe, different struct. π«Άfrequencyβ on success this holds the pin's frequency. This is the good stuff, the actual answer. β¨extackβ error reporting. When things go sideways, this is who you tell. π
π§ DESCRIPTION π§
It calls the get frequency command for the corresponding active input/output. That's it, that's the description. Short, sweet, gets the number. π₯
π CONTEXT π
Little heads-up, bestie β this one calls a function which acquires and releases pf->dplls.lock. So like, the lock is handled for you, but also, the lock is happening. Know that. π
π RETURN π
0β success π slay- negative β error, pin not active or couldn't get from hw π
So real talk: if you get a negative number back, either the pin wasn't active or the hardware just wouldn't cough up the frequency. Not your fault, but also, do handle it.
β SEE ALSO β
Genuinely the longest list I've ever seen and I'm obsessed. It lives in the kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c π, and also there's enum... and then all of these icons:
ice_dpll_pin_type(9)ice_dpll_is_sw_pin(9)ice_dpll_is_reset(9)ice_dpll_pin_freq_set(9)ice_dpll_frequency_set(9)ice_dpll_input_frequency_set(9)ice_dpll_output_frequency_set(9)ice_dpll_frequency_get(9)ice_dpll_input_frequency_get(9)ice_dpll_output_frequency_get(9)ice_dpll_sw_pin_frequency_set(9)ice_dpll_pin_enable(9)ice_dpll_pin_disable(9)ice_dpll_pin_store_state(9)ice_dpll_rclk_update_e825c(9)ice_dpll_rclk_update(9)ice_dpll_sw_pins_update(9)ice_dpll_pin_state_update(9)ice_dpll_hw_input_prio_set(9)ice_dpll_lock_status_get(9)ice_dpll_mode_get(9)ice_dpll_phase_offset_monitor_set(9)ice_dpll_phase_offset_monitor_get(9)ice_dpll_pin_state_set(9)ice_dpll_output_state_set(9)ice_dpll_input_state_set(9)ice_dpll_pin_state_get(9)ice_dpll_output_state_get(9)ice_dpll_input_state_get(9)ice_dpll_sw_pin_notify_peer(9)ice_dpll_sma_direction_set(9)ice_dpll_ufl_pin_state_set(9)ice_dpll_sw_pin_state_get(9)ice_dpll_sma_pin_state_set(9)ice_dpll_input_prio_get(9)ice_dpll_input_prio_set(9)ice_dpll_input_direction(9)ice_dpll_output_direction(9)ice_dpll_pin_sma_direction_set(9)ice_dpll_pin_sw_direction_get(9)ice_dpll_pin_phase_adjust_get(9)ice_dpll_pin_phase_adjust_set(9)ice_dpll_input_phase_adjust_set(9)ice_dpll_output_phase_adjust_set(9)ice_dpll_sw_phase_adjust_get(9)ice_dpll_sw_phase_adjust_set(9)ice_dpll_phase_offset_get(9)ice_dpll_synce_update_e825c(9)ice_dpll_output_esync_set(9)ice_dpll_output_esync_get(9)ice_dpll_input_esync_set(9)ice_dpll_input_esync_get(9)ice_dpll_sw_esync_set(9)ice_dpll_sw_esync_get(9)ice_dpll_input_ref_sync_get(9)ice_dpll_sw_input_ref_sync_get(9)ice_dpll_rclk_state_on_pin_set(9)ice_dpll_rclk_state_on_pin_get(9)ice_dpll_txclk_work(9)ice_dpll_txclk_state_on_dpll_set(9)ice_dpll_txclk_state_on_dpll_get(9)ice_generate_clock_id(9)ice_dpll_pin_ntf(9)ice_dpll_notify_changes(9)ice_dpll_is_pps_phase_monitor(9)ice_dpll_pins_notify_mask(9)ice_dpll_pps_update_phase_offsets(9)ice_dpll_update_state(9)ice_dpll_periodic_work(9)ice_dpll_init_ref_sync_inputs(9)ice_dpll_release_pins(9)ice_dpll_get_pins(9)ice_dpll_unregister_pins(9)ice_dpll_pin_ref_sync_register(9)ice_dpll_register_pins(9)ice_dpll_deinit_direct_pins(9)ice_dpll_init_direct_pins(9)ice_dpll_deinit_rclk_pin(9)ice_dpll_init_pin_common(9)ice_dpll_init_rclk_pin(9)ice_dpll_deinit_pins(9)ice_dpll_init_fwnode_pins(9)ice_dpll_init_pins_e825(9)ice_dpll_init_pins(9)ice_dpll_deinit_dpll(9)ice_dpll_init_dpll(9)ice_dpll_deinit_worker(9)ice_dpll_init_worker(9)ice_dpll_phase_range_set(9)ice_dpll_init_info_pins_generic(9)ice_dpll_init_info_direct_pins(9)ice_dpll_init_info_pin_on_pin_e825c(9)ice_dpll_init_info_rclk_pin(9)ice_dpll_init_info_sw_pins(9)ice_dpll_init_info_txclk_pins_e825c(9)ice_dpll_init_pins_info(9)ice_dpll_deinit_info(9)ice_dpll_init_info_e825c(9)ice_dpll_init_info(9)ice_dpll_deinit(9)ice_dpll_init_e825(9)ice_dpll_init_e810(9)
Like I said. Iconic. Periodt. π
And that's the whole page, bestie! π«Ά This lil masterpiece comes from ./drivers/net/ethernet/intel/ice, dated October 2026, and it's filed under ice_dpll_sw...requency_get(9) in the Kernel API Manual. Go forth and get those frequencies. πβ¨π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms