ice_dpll_pin_disable(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

okay bestie, this is ice_dpll_pin_disable(9) from the Kernel API Manual β€” a whole kernel function page, and we’re gonna make it make sense πŸ’…βœ¨

πŸ’– NAME πŸ’–

ice_dpll_pin_disable β€” disable a pin on dplls. That’s literally the name and the whole vibe: this function disables a pin on dplls. πŸŽ€

✨ SYNOPSIS ✨

int ice_dpll_pin_disable (struct ice_hw *hw , struct ice_dpll_pin *pin ,
enum ice_dpll_pin_type pin_type , struct netlink_ext_ack *extack );

πŸŽ€ ARGUMENTS πŸŽ€

  • hw β€” the board’s private hw structure. It’s giving β€œmain character’s backstage pass” energy 🎟️
  • pin β€” pointer to a pin. Yes bestie, a pointer to the actual pin πŸ’…
  • pin_type β€” the type of pin being disabled. Gotta know which kind of pin we’re switching off πŸ”₯
  • extack β€” error reporting. It’s the error vibe check, fr fr πŸ’€

πŸ¦‹ DESCRIPTION πŸ¦‹

Disable a pin on both dplls. The current state gets stored in pin->flags, no cap β€” the way that this keeps the state around is lowkey iconic πŸ¦‹

🌸 CONTEXT 🌸

Called under pf->dplls.lock. So yeah, it’s a lock-holder situation β€” respect the lock, bestie πŸ”’πŸŒΈ

πŸ”₯ RETURN πŸ”₯

  • 0 β€” OK. Slay βœ…
  • negative β€” error. Not slay 😭

πŸ‘‘ SEE ALSO πŸ‘‘

okay bestie, if you wanna go deeper, here’s the whole kernel friend group β€” every single reference from the original, plus the kernel file that started it all. No cap, all of them are here πŸ‘‘:

Kernel file ./drivers/net/ethernet/intel/ice/ice_dpll.c enum
ice_dpll_pin_type(9), ice_dpll_is_sw_pin(9), ice_dpll_is_reset(9),
ice_dpll_pin_freq_set(9), ice_dpll_frequency_set(9),
ice_dpll_input_frequency_set(9), ice_dpll_output_frequency_set(9),
ice_dpll_frequency_get(9), ice_dpll_input_frequency_get(9),
ice_dpll_output_frequency_get(9), ice_dpll_sw_pin_frequency_set(9),
ice_dpll_sw_pin_frequency_get(9), ice_dpll_pin_enable(9),
ice_dpll_pin_store_state(9), ice_dpll_rclk_update_e825c(9),
ice_dpll_rclk_update(9), ice_dpll_sw_pins_update(9),
ice_dpll_pin_state_update(9), ice_dpll_hw_input_prio_set(9),
ice_dpll_lock_status_get(9), ice_dpll_mode_get(9),
ice_dpll_phase_offset_monitor_set(9),
ice_dpll_phase_offset_monitor_get(9), ice_dpll_pin_state_set(9),
ice_dpll_output_state_set(9), ice_dpll_input_state_set(9),
ice_dpll_pin_state_get(9), ice_dpll_output_state_get(9),
ice_dpll_input_state_get(9), ice_dpll_sw_pin_notify_peer(9),
ice_dpll_sma_direction_set(9), ice_dpll_ufl_pin_state_set(9),
ice_dpll_sw_pin_state_get(9), ice_dpll_sma_pin_state_set(9),
ice_dpll_input_prio_get(9), ice_dpll_input_prio_set(9),
ice_dpll_input_direction(9), ice_dpll_output_direction(9),
ice_dpll_pin_sma_direction_set(9), ice_dpll_pin_sw_direction_get(9),
ice_dpll_pin_phase_adjust_get(9), ice_dpll_pin_phase_adjust_set(9),
ice_dpll_input_phase_adjust_set(9), ice_dpll_output_phase_adjust_set(9),
ice_dpll_sw_phase_adjust_get(9), ice_dpll_sw_phase_adjust_set(9),
ice_dpll_phase_offset_get(9), ice_dpll_synce_update_e825c(9),
ice_dpll_output_esync_set(9), ice_dpll_output_esync_get(9),
ice_dpll_input_esync_set(9), ice_dpll_input_esync_get(9),
ice_dpll_sw_esync_set(9), ice_dpll_sw_esync_get(9),
ice_dpll_input_ref_sync_get(9), ice_dpll_sw_input_ref_sync_get(9),
ice_dpll_rclk_state_on_pin_set(9), ice_dpll_rclk_state_on_pin_get(9),
ice_dpll_txclk_work(9), ice_dpll_txclk_state_on_dpll_set(9),
ice_dpll_txclk_state_on_dpll_get(9), ice_generate_clock_id(9),
ice_dpll_pin_ntf(9), ice_dpll_notify_changes(9),
ice_dpll_is_pps_phase_monitor(9), ice_dpll_pins_notify_mask(9),
ice_dpll_pps_update_phase_offsets(9), ice_dpll_update_state(9),
ice_dpll_periodic_work(9), ice_dpll_init_ref_sync_inputs(9),
ice_dpll_release_pins(9), ice_dpll_get_pins(9),
ice_dpll_unregister_pins(9), ice_dpll_pin_ref_sync_register(9),
ice_dpll_register_pins(9), ice_dpll_deinit_direct_pins(9),
ice_dpll_init_direct_pins(9), ice_dpll_deinit_rclk_pin(9),
ice_dpll_init_pin_common(9), ice_dpll_init_rclk_pin(9),
ice_dpll_deinit_pins(9), ice_dpll_init_fwnode_pins(9),
ice_dpll_init_pins_e825(9), ice_dpll_init_pins(9),
ice_dpll_deinit_dpll(9), ice_dpll_init_dpll(9),
ice_dpll_deinit_worker(9), ice_dpll_init_worker(9),
ice_dpll_phase_range_set(9), ice_dpll_init_info_pins_generic(9),
ice_dpll_init_info_direct_pins(9),
ice_dpll_init_info_pin_on_pin_e825c(9), ice_dpll_init_info_rclk_pin(9),
ice_dpll_init_info_sw_pins(9), ice_dpll_init_info_txclk_pins_e825c(9),
ice_dpll_init_pins_info(9), ice_dpll_deinit_info(9),
ice_dpll_init_info_e825c(9), ice_dpll_init_info(9), ice_dpll_deinit(9),
ice_dpll_init_e825(9), ice_dpll_init_e810(9)

mwah πŸ’‹ this page’s source/version is ./drivers/net/ethernet/intel/ice and it’s dated October 2026 🫢

πŸ“¦ where this page comes from