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S (continued)

• spear_smi_int_handler(9)SMI Interrupt Handler.✨
• spear_smi_probe(9)Entry routine✨
• spear_smi_probe_flash(9)Detects the NOR Flash chip.✨
• spear_smi_read_sr(9)Read status register of flash through SMI✨
• spear_smi_remove(9)Exit routine✨
• spear_smi_wait_till_ready(9)wait till flash is ready✨
• spear_smi_write_enable(9)Enable the flash to do write operation✨
• special care dsi(9)✨
• speed_to_fw_caps(9)translate Port Speed to Firmware Port Capabilities✨
• speedstep_activate(9)activate SpeedStep control in the chipset✨
• speedstep_detect_chipset(9)detect the Southbridge which contains SpeedStep logic✨
• speedstep_exit(9)unregisters SpeedStep support✨
• speedstep_find_register(9)read the PMBASE address✨
• speedstep_init(9)initializes the SpeedStep CPUFreq driver✨
• speedstep_set_state(9)set the SpeedStep state✨
• speedstep_smi_get_freqs(9)get SpeedStep preferred & current freq.✨
• speedstep_smi_ownership(9)✨
• speedstep_target(9)set a new CPUFreq policy✨
• spi_add_device(9)Add spi_device allocated with spi_alloc_device✨
• spi_alloc_device(9)Allocate a new SPI device✨
• spi_async(9)asynchronous SPI transfer✨
• spi_bitbang_start(9)start up a polled/bitbanging SPI host controller driver✨
• spi_bpw_to_bytes(9)Covert bits per word to bytes✨
• spi_bus_lock(9)obtain a lock for exclusive SPI bus usage✨
• spi_bus_unlock(9)release the lock for exclusive SPI bus usage✨
• spi_controller_dma_map_mem_op_data(9)DMA-map the buffer attached to a memory operation✨
• spi_controller_dma_unmap_mem_op_data(9)DMA-unmap the buffer attached to a memory operation✨
• spi_controller_xfer_timeout(9)Compute a suitable timeout value✨
• spi_davinci_get_pdata(9)Get platform data from DTS binding✨
• spi_display_xfer_agreement(9)Print the current target transfer agreement✨
• spi_dv_device(9)Do Domain Validation on the device✨
• spi_finalize_current_message(9)the current message is complete✨
• spi_finalize_current_transfer(9)report completion of a transfer✨
• spi_flush_queue(9)Send all pending messages in the queue from the callers' context✨
• spi_get_gpio_descs(9)grab chip select GPIOs for the controller✨
• spi_get_next_queued_message(9)called by driver to check for queued messages✨
• spi_is_bpw_supported(9)Check if bits per word is supported✨
• spi_mem_adjust_op_freq(9)Adjust the frequency of a SPI mem operation to match controller, PCB and chip limitations✨
• spi_mem_adjust_op_size(9)Adjust the data size of a SPI mem operation to match controller limitations✨
• spi_mem_calc_op_duration(9)Derives the theoretical length (in ns) of an operation. This helps finding the best variant among a list of possible choices.✨
• spi_mem_dirmap_create(9)Create a direct mapping descriptor✨
• spi_mem_dirmap_destroy(9)Destroy a direct mapping descriptor✨
• spi_mem_dirmap_read(9)Read data through a direct mapping✨
• spi_mem_dirmap_write(9)Write data through a direct mapping✨
• spi_mem_driver_register_with_owner(9)Register a SPI memory driver✨
• spi_mem_driver_unregister(9)Unregister a SPI memory driver✨
• spi_mem_exec_op(9)Execute a memory operation✨
• spi_mem_get_drvdata(9)get driver private data attached to a SPI mem device✨
• spi_mem_get_name(9)Return the SPI mem device name to be used by the upper layer if necessary✨
• spi_mem_has_dqs(9)Query whether the DQS is available or not✨
• spi_mem_poll_status(9)Poll memory device status✨
• spi_mem_set_dqs(9)Mark DQS as being available✨
• spi_mem_set_drvdata(9)attach driver private data to a SPI mem device✨
• spi_mem_supports_op(9)Check if a memory device and the controller it is connected to support a specific memory operation✨
• spi_message_init_with_transfers(9)Initialize spi_message and append transfers✨
• spi_new_ancillary_device(9)Register ancillary SPI device✨
• spi_new_device(9)instantiate one new SPI device✨
• spi_nor_check_sfdp_signature(9)check for a valid SFDP signature✨
• spi_nor_destroy_erase_cmd_list(9)destroy erase command list✨
• spi_nor_div_by_erase_size(9)calculate remainder and update new dividend✨
• spi_nor_erase_die(9)Erase the entire die.✨
• spi_nor_erase_multi_sectors(9)perform a non-uniform erase✨
• spi_nor_find_best_erase_type(9)find the best erase type for the given offset in the serial flash memory and the number of bytes to erase. The region in which the address fits is expected to be provided.✨
• spi_nor_get_cmd_ext(9)Get the command opcode extension based on the extension type.✨
• spi_nor_get_map_in_use(9)get the configuration map in use✨
• spi_nor_global_block_unlock(9)Unlock Global Block Protection.✨
• spi_nor_init_default_params(9)Default initialization of flash parameters and settings. Done for all flashes, regardless is they define SFDP tables or not.✨
• spi_nor_init_erase_cmd(9)initialize an erase command✨
• spi_nor_init_erase_cmd_list(9)initialize erase command list✨
• spi_nor_init_fixup_flags(9)Initialize NOR flags for settings that can not be discovered by SFDP for this particular flash because the SFDP table that indicates this support is not defined in the flash. In case the table for…✨
• spi_nor_init_flags(9)Initialize NOR flags for settings that are not defined in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP.✨
• spi_nor_init_non_uniform_erase_map(9)initialize the non-uniform erase map✨
• spi_nor_init_params(9)Initialize the flash's parameters and settings.✨
• spi_nor_init_params_deprecated(9)Deprecated way of initializing flash parameters and settings.✨
• spi_nor_init_uniform_erase_map(9)Initialize uniform erase map✨
• spi_nor_late_init_params(9)Late initialization of default flash parameters.✨
• spi_nor_manufacturer_init_params(9)Initialize the flash's parameters and settings based on MFR register and ->default_init() hook.✨
• spi_nor_map_cmp_erase_type(9)compare the map's erase types by size✨
• spi_nor_mask_erase_type(9)mask out a SPI NOR erase type✨
• spi_nor_needs_sfdp(9)returns true if SFDP parsing is used for this flash.✨
• spi_nor_no_sfdp_init_params(9)Initialize the flash's parameters and settings based on nor->info->sfdp_flags. This method should be called only by flashes that do not define SFDP tables. If the flash supports SFDP but the…✨
• spi_nor_otp_erase_secr(9)erase a security register✨
• spi_nor_otp_is_locked_sr2(9)get the OTP region lock status✨
• spi_nor_otp_lock_sr2(9)lock the OTP region✨
• spi_nor_otp_read_secr(9)read security register✨
• spi_nor_otp_write_secr(9)write security register✨
• spi_nor_parse_4bait(9)parse the 4-Byte Address Instruction Table✨
• spi_nor_parse_bfpt(9)read and parse the Basic Flash Parameter Table.✨
• spi_nor_parse_profile1(9)parse the xSPI Profile 1.0 table✨
• spi_nor_parse_sccr(9)Parse the Status, Control and Configuration Register Map.✨
• spi_nor_parse_sccr_mc(9)Parse the Status, Control and Configuration Register Map Offsets for Multi-Chip SPI Memory Devices.✨
• spi_nor_parse_sfdp(9)parse the Serial Flash Discoverable Parameters.✨
• spi_nor_parse_smpt(9)parse Sector Map Parameter Table✨
• spi_nor_post_sfdp_fixups(9)Updates the flash's parameters and settings after SFDP has been parsed. Called only for flashes that define JESD216 SFDP tables.✨
• spi_nor_quad_enable(9)enable Quad I/O if needed.✨
• spi_nor_read_any_reg(9)read any register from flash memory, nonvolatile or volatile.✨
• spi_nor_read_cr(9)Read the Configuration Register using the SPINOR_OP_RDCR (35h) command.✨
• spi_nor_read_data(9)read data from flash memory✨
• spi_nor_read_id(9)Read the JEDEC ID.✨
• spi_nor_read_raw(9)raw read of serial flash memory. read_opcode, addr_nbytes and read_dummy members of the struct spi_nor should be previously set.✨
• spi_nor_read_sfdp(9)read Serial Flash Discoverable Parameters.✨
• spi_nor_read_sfdp_dma_unsafe(9)read Serial Flash Discoverable Parameters.✨
• spi_nor_read_sr(9)Read the Status Register.✨
• spi_nor_read_sr2(9)Read the Status Register 2 using the SPINOR_OP_RDSR2 (3fh) command.✨
• spi_nor_ready(9)Query the flash to see if it is ready for new commands.✨
• spi_nor_region_check_overlay(9)set overlay bit when the region is overlaid✨
• spi_nor_regions_sort_erase_types(9)sort erase types in each region✨
• spi_nor_scan(9)scan the SPI NOR✨
• spi_nor_select_uniform_erase(9)select optimum uniform erase type✨
• spi_nor_set_4byte_addr_mode(9)Set address mode.✨
• spi_nor_set_4byte_addr_mode_brwr(9)Set 4-byte address mode using SPINOR_OP_BRWR. Typically used by Spansion flashes.✨
• spi_nor_set_4byte_addr_mode_en4b_ex4b(9)Enter/Exit 4-byte address mode using SPINOR_OP_EN4B/SPINOR_OP_EX4B. Typically used by Winbond and Macronix.✨
• spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)Set 4-byte address mode using SPINOR_OP_WREN followed by SPINOR_OP_EN4B or SPINOR_OP_EX4B. Typically used by ST and Micron flashes.✨
• spi_nor_set_erase_settings_from_bfpt(9)set erase type settings from BFPT✨
• spi_nor_set_erase_type(9)set a SPI NOR erase type✨
• spi_nor_sfdp_init_params_deprecated(9)Deprecated way of initializing flash parameters and settings based on JESD216 SFDP standard.✨
• spi_nor_smpt_addr_nbytes(9)return the number of address bytes used in the configuration detection command.✨
• spi_nor_smpt_read_dummy(9)return the configuration detection command read latency, in clock cycles.✨
• spi_nor_soft_reset(9)Perform a software reset✨
• spi_nor_sort_erase_mask(9)sort erase mask✨
• spi_nor_spimem_adjust_hwcaps(9)Find optimal Read/Write protocol based on SPI controller capabilities✨
• spi_nor_spimem_bounce(9)check if a bounce buffer is needed for the data transfer✨
• spi_nor_spimem_check_pp(9)check if the page program op is supported by controller✨
• spi_nor_spimem_check_read_pp_op(9)check if a read or a page program operation is supported by controller✨
• spi_nor_spimem_check_readop(9)check if the read op is supported by controller✨
• spi_nor_spimem_exec_op(9)execute a memory operation✨
• spi_nor_spimem_read_data(9)read data from flash's memory region via spi- mem✨
• spi_nor_spimem_setup_op(9)Set up common properties of a spi-mem op.✨
• spi_nor_spimem_write_data(9)write data to flash memory via spi-mem✨
• spi_nor_sr1_bit6_quad_enable(9)Set the Quad Enable BIT(6) in the Status Register 1.✨
• spi_nor_sr2_bit1_quad_enable(9)set the Quad Enable BIT(1) in the Status Register 2.✨
• spi_nor_sr2_bit7_quad_enable(9)set QE bit in Status Register 2.✨
• spi_nor_sr_ready(9)Query the Status Register to see if the flash is ready for new commands.✨
• spi_nor_try_unlock_all(9)Tries to unlock the entire flash memory array.✨
• spi_nor_use_parallel_locking(9)Checks if RWW locking scheme shall be used✨
• spi_nor_wait_till_ready(9)Wait for a predefined amount of time for the flash to be ready, or timeout occurs.✨
• spi_nor_wait_till_ready_with_timeout(9)Service routine to read the Status Register until ready, or timeout occurs.✨
• spi_nor_write_16bit_cr_and_check(9)Write the Status Register 1 and the Configuration Register in one shot. Ensure that the byte written in the Configuration Register match the received value, and that the 16-bit Write did not affect…✨
• spi_nor_write_16bit_sr_and_check(9)Write the Status Register 1 and the Status Register 2 in one shot. Ensure that the byte written in the Status Register 1 match the received value, and that the 16-bit Write did not affect what was…✨
• spi_nor_write_16bit_sr_cr_and_check(9)Write the Status Register 1 and the Configuration Register in one shot. Ensure that the bytes written in both registers match the received value.✨
• spi_nor_write_any_volatile_reg(9)write any volatile register to flash memory.✨
• spi_nor_write_data(9)write data to flash memory✨
• spi_nor_write_disable(9)Send Write Disable instruction to the chip.✨
• spi_nor_write_enable(9)Set write enable latch with Write Enable command.✨
• spi_nor_write_sr(9)Write the Status Register.✨
• spi_nor_write_sr1_and_check(9)Write one byte to the Status Register 1 and ensure that the byte written match the received value.✨
• spi_nor_write_sr2(9)Write the Status Register 2 using the SPINOR_OP_WRSR2 (3eh) command.✨
• spi_nor_write_sr_and_check(9)Write the Status Register 1 and ensure that the byte written match the received value without affecting other bits in the Status Register 1 and 2.✨
• spi_nor_write_sr_cr_and_check(9)Write the Status Register 1 and ensure that the byte written match the received value. Same for the Control Register if available.✨
• spi_offload_trigger_disable(9)disables hardware trigger for offload✨
• spi_offload_trigger_enable(9)enables trigger for offload✨
• spi_offload_trigger_get_priv(9)Get the private data for the trigger✨
• spi_offload_trigger_validate(9)Validate the requested trigger✨
• spi_optimize_message(9)do any one-time validation and setup for a SPI message✨
• spi_populate_tag_msg(9)place a tag message in a buffer✨
• spi_pump_messages(9)kthread work function which processes spi message queue✨
• spi_queued_transfer(9)transfer function for queued transfers✨
• spi_read(9)SPI synchronous read✨
• spi_register_board_info(9)register SPI devices for a given board✨
• spi_register_controller(9)register SPI host or target controller✨
• spi_replace_transfers(9)replace transfers with several transfers and register change with spi_message.resources✨
• spi_res_add(9)add a spi_res to the spi_message✨
• spi_res_alloc(9)allocate a spi resource that is life-cycle managed during the processing of a spi_message while using spi_transfer_one✨
• spi_res_free(9)free an SPI resource✨
• spi_res_release(9)release all SPI resources for this message✨
• spi_schedule_dv_device(9)schedule domain validation to occur on the device✨
• spi_set_cs_timing(9)configure CS setup, hold, and inactive delays✨
• spi_set_thread_rt(9)set the controller to pump at realtime priority✨
• spi_setup(9)setup SPI mode and clock rate✨
• spi_split_transfers_maxsize(9)split spi transfers into multiple transfers when an individual transfer exceeds a certain size✨
• spi_split_transfers_maxwords(9)split SPI transfers into multiple transfers when an individual transfer exceeds a certain number of SPI words✨
• spi_sync(9)blocking/synchronous SPI data transfers✨
• spi_sync_locked(9)version of spi_sync with exclusive bus usage✨
• spi_sync_transfer(9)synchronous SPI data transfer✨
• spi_take_timestamp_post(9)helper to collect the end of the TX timestamp✨
• spi_take_timestamp_pre(9)helper to collect the beginning of the TX timestamp✨
• spi_target_abort(9)abort the ongoing transfer request on an SPI target controller✨
• spi_test_execute_msg(9)default implementation to run a test✨
• spi_test_run_test(9)run an individual spi_test including all the relevant iterations on: length and buffer alignment✨
• spi_test_run_tests(9)run an array of spi_messages tests✨
• spi_unoptimize_message(9)releases any resources allocated by spi_optimize_message()✨
• spi_unregister_controller(9)unregister SPI host or target controller✨
• spi_unregister_device(9)unregister a single SPI device✨
• spi_unregister_driver(9)reverse effect of spi_register_driver✨
• spi_w8r16(9)SPI synchronous 8 bit write followed by 16 bit read✨
• spi_w8r16be(9)SPI synchronous 8 bit write followed by 16 bit big-endian read✨
• spi_w8r8(9)SPI synchronous 8 bit write followed by 8 bit read✨
• spi_write(9)SPI synchronous write✨
• spi_write_then_read(9)SPI synchronous write followed by read✨
• spin_event_timeout(9)spin until a condition gets true or a timeout elapses✨
• spin_is_locked(9)Check whether a spinlock is locked.✨
• spinand_fact_otp_read(9)Read from OTP area✨
• spinand_fact_otp_size(9)Get SPI-NAND factory OTP area size✨
• spinand_match_and_init(9)Try to find a match between a device ID and an entry in a spinand_info table✨
• spinand_otp_page_size(9)Get SPI-NAND OTP page size✨
• spinand_read_page(9)Read a page✨
• spinand_select_target(9)Select a specific NAND target/die✨
• spinand_set_mtd_otp_ops(9)Setup OTP methods✨
• spinand_set_of_node(9)Attach a DT node to a SPI NAND device✨
• spinand_to_mtd(9)Get the MTD device embedded in a SPI NAND device✨