spi_nor_wri...cr_and_check(9)

💖 spi_nor_wri...cr_and_check(9) 💖

okay bestie, welcome to the Kernel API Manual — this is the page for spi_nor_wri...cr_and_check(9), and the full function name is spi_nor_write_16bit_sr_cr_and_check (iykyk, the header just truncates it for ✨drama✨).

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🌸 NAME 🌸

spi_nor_write_16bit_sr_cr_and_check — write Status Register 1 and the Configuration Register in one shot. It also makes sure the bytes written in both registers match the received value, no cap. 💅

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✨ SYNOPSIS ✨

int spi_nor_write_16bit_sr_cr_and_check (struct spi_nor *nor , const u8 *regs );

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🎀 ARGUMENTS 🎀

• nor — this is your pointer to a struct spi_nor, bestie. The whole flash-chip situation lives through this bad boy.
• regs — a two-byte array holding the values that get written to the status and configuration registers. Exactly two bytes, exactly the values you want going out. 🫶

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💅 RETURN 💅

• 0 on success — slay. ✅
• -errno otherwise — not slay, but at least you get an error code. 😭

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👑 SEE ALSO 👑

the kernel file is ./drivers/mtd/spi-nor/core.c, and honestly it's giving main character energy with this whole friend group:

• spi_nor_get_cmd_ext(9)
• spi_nor_spimem_setup_op(9)
• spi_nor_spimem_bounce(9)
• spi_nor_spimem_exec_op(9)
• spi_nor_spimem_read_data(9)
• spi_nor_read_data(9)
• spi_nor_spimem_write_data(9)
• spi_nor_write_data(9)
• spi_nor_read_any_reg(9)
• spi_nor_write_any_volatile_reg(9)
• spi_nor_write_enable(9)
• spi_nor_write_disable(9)
• spi_nor_read_id(9)
• spi_nor_read_sr(9)
• spi_nor_read_cr(9)
• spi_nor_set_4byte_addr_mode_en4b_ex4b(9)
• spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)
• spi_nor_set_4byte_addr_mode_brwr(9)
• spi_nor_sr_ready(9)
• spi_nor_use_parallel_locking(9)
• spi_nor_ready(9)
• spi_nor_wait_till_ready_with_timeout(9)
• spi_nor_wait_till_ready(9)
• spi_nor_global_block_unlock(9)
• spi_nor_write_sr(9)
• spi_nor_write_sr1_and_check(9)
• spi_nor_write_16bit_sr_and_check(9)
• spi_nor_write_16bit_cr_and_check(9)
• spi_nor_write_sr_and_check(9)
• spi_nor_write_sr_cr_and_check(9)
• spi_nor_write_sr2(9)
• spi_nor_read_sr2(9)
• spi_nor_erase_die(9)
• spi_nor_div_by_erase_size(9)
• spi_nor_find_best_erase_type(9)
• spi_nor_init_erase_cmd(9)
• spi_nor_destroy_erase_cmd_list(9)
• spi_nor_init_erase_cmd_list(9)
• spi_nor_erase_multi_sectors(9)
• spi_nor_sr1_bit6_quad_enable(9)
• spi_nor_sr2_bit1_quad_enable(9)
• spi_nor_sr2_bit7_quad_enable(9)
• spi_nor_spimem_check_read_pp_op(9)
• spi_nor_spimem_check_readop(9)
• spi_nor_spimem_check_pp(9)
• spi_nor_spimem_adjust_hwcaps(9)
• spi_nor_set_erase_type(9)
• spi_nor_mask_erase_type(9)
• spi_nor_init_uniform_erase_map(9)
• spi_nor_select_uniform_erase(9)
• spi_nor_manufacturer_init_params(9)
• spi_nor_no_sfdp_init_params(9)
• spi_nor_init_flags(9)
• spi_nor_init_fixup_flags(9)
• spi_nor_late_init_params(9)
• spi_nor_sfdp_init_params_deprecated(9)
• spi_nor_init_params_deprecated(9)
• spi_nor_init_default_params(9)
• spi_nor_init_params(9)
• spi_nor_quad_enable(9)
• spi_nor_set_4byte_addr_mode(9)
• spi_nor_soft_reset(9)

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okay and for the cute sign-off: this page lives in ./drivers/mtd/spi-nor, dated October 2026, under the manual name spi_nor_wri...cr_and_check(9) — periodt, go write those registers correctly bestie 💜✨