spi_nor_read_id(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… spi_nor_read_id β€” aka the "who even ARE you" function

ok so bestie, this is a page from the Kernel API Manual (yes, the serious one), and today's main character is spi_nor_read_id. It reads the JEDEC ID. That's it. That's the whole personality. And honestly? Iconic. ✨


🌸 SYNOPSIS 🌸

int spi_nor_read_id (struct spi_nor *nor , u8 naddr , u8 ndummy , u8 *id
, enum spi_nor_protocol proto );

like, look at her. five params, one int return, zero drama (mostly).


πŸŽ€ ARGUMENTS πŸŽ€

okay so let's meet the cast 🫢

  • nor β€” a pointer to struct spi_nor. this is the little guy we're interrogating.
  • naddr β€” how many address bytes to send. and get this: it can be zero if the operation doesn't need to send an address at all. lowkey flexible of her.
  • ndummy β€” how many dummy bytes to send after an opcode or address. also can be zero if the operation doesn't require dummy bytes. dummy bytes are such a vibe, but like, optional.
  • id β€” pointer to a DMA-able buffer where the value of the JEDEC ID will be written. ⚠️ note that: DMA-able. don't be handing her some random stack buffer and then acting surprised, bestie. 😭
  • ndummy… jk jk, moving on
  • proto β€” the SPI protocol for register operation. that's the vibe check for how we talk to the chip.

πŸ’– RETURN πŸ’–

  • 0 on success πŸŽ‰
  • -errno otherwise πŸ’€ (the classic "something went sideways" special, no cap)

πŸ¦‹ SEE ALSO πŸ¦‹

okay this list is long long, but I'm not skipping a single one because every single one is part of the family. Kernel file ./drivers/mtd/spi-nor/core.c, and then, in order:

spi_nor_get_cmd_ext(9), spi_nor_spimem_setup_op(9), spi_nor_spimem_bounce(9), spi_nor_spimem_exec_op(9), spi_nor_spimem_read_data(9), spi_nor_read_data(9), spi_nor_spimem_write_data(9), spi_nor_write_data(9), spi_nor_read_any_reg(9), spi_nor_write_any_volatile_reg(9), spi_nor_write_enable(9), spi_nor_write_disable(9), spi_nor_read_sr(9), spi_nor_read_cr(9), spi_nor_set_4byte_addr_mode_en4b_ex4b(9), spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9), spi_nor_set_4byte_addr_mode_brwr(9), spi_nor_sr_ready(9), spi_nor_use_parallel_locking(9), spi_nor_ready(9), spi_nor_wait_till_ready_with_timeout(9), spi_nor_wait_till_ready(9), spi_nor_global_block_unlock(9), spi_nor_write_sr(9), spi_nor_write_sr1_and_check(9), spi_nor_write_16bit_sr_and_check(9), spi_nor_write_16bit_cr_and_check(9), spi_nor_write_16bit_sr_cr_and_check(9), spi_nor_write_sr_and_check(9), spi_nor_write_sr_cr_and_check(9), spi_nor_write_sr2(9), spi_nor_read_sr2(9), spi_nor_erase_die(9), spi_nor_div_by_erase_size(9), spi_nor_find_best_erase_type(9), spi_nor_init_erase_cmd(9), spi_nor_destroy_erase_cmd_list(9), spi_nor_init_erase_cmd_list(9), spi_nor_erase_multi_sectors(9), spi_nor_sr1_bit6_quad_enable(9), spi_nor_sr2_bit1_quad_enable(9), spi_nor_sr2_bit7_quad_enable(9), spi_nor_spimem_check_read_pp_op(9), spi_nor_spimem_check_readop(9), spi_nor_spimem_check_pp(9), spi_nor_spimem_adjust_hwcaps(9), spi_nor_set_erase_type(9), spi_nor_mask_erase_type(9), spi_nor_init_uniform_erase_map(9), spi_nor_select_uniform_erase(9), spi_nor_manufacturer_init_params(9), spi_nor_no_sfdp_init_params(9), spi_nor_init_flags(9), spi_nor_init_fixup_flags(9), spi_nor_late_init_params(9), spi_nor_sfdp_init_params_deprecated(9), spi_nor_init_params_deprecated(9), spi_nor_init_default_params(9), spi_nor_init_params(9), spi_nor_quad_enable(9), spi_nor_set_4byte_addr_mode(9), spi_nor_soft_reset(9)

fr fr, that's the whole squad. go say hi. 🌈


mwah πŸ’‹ that's the page! brought to you courtesy of ./drivers/mtd/spi-nor, dated October 2026 β€” mark your calendars bestie, she's timeless. πŸŽ€βœ¨

πŸ“¦ where this page comes from