spi_nor_write_sr2(9)
π spi_nor_write_sr2 β the Kernel API Manual glow-up β¨
okay so bestie, welcome to spi_nor_write_sr2(9), the little kernel function whose whole entire job is writing Status Register 2. That's it. That's the vibe. π
πΈ NAME πΈ
spi_nor_write_sr2 β literally writes the Status Register 2 using the SPINOR_OP_WRSR2 (3eh) command. no cap, that's the whole assignment π
β¨ SYNOPSIS β¨
int spi_nor_write_sr2 (struct spi_nor *nor , const u8 *sr2 );
like. look at her. two args. one int coming back. iconic. π
π¦ ARGUMENTS π¦
norβ pointer tostruct spi_nor. it's giving "the flash chip's whole personality" honestly, you pass the SPI NOR struct in and she knows where she's going π«Άsr2β pointer to a DMA-able buffer holding the value you wanna write into Status Register 2. yes, DMA-able, don't forget that part, it's not optional bestie π
π₯ RETURN π₯
0on success π-errnootherwise π (classic kernel behavior, fr fr)
π§ SEE ALSO π§
so. the guest list for this function's little party lives in the kernel file ./drivers/mtd/spi-nor/core.c, and it is LONG, so buckle up buttercup π
spi_nor_get_cmd_ext(9)spi_nor_spimem_setup_op(9)spi_nor_spimem_bounce(9)spi_nor_spimem_exec_op(9)spi_nor_spimem_read_data(9)spi_nor_read_data(9)spi_nor_spimem_write_data(9)spi_nor_write_data(9)spi_nor_read_any_reg(9)spi_nor_write_any_volatile_reg(9)spi_nor_write_enable(9)spi_nor_write_disable(9)spi_nor_read_id(9)spi_nor_read_sr(9)spi_nor_read_cr(9)spi_nor_set_4byte_addr_mode_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_brwr(9)spi_nor_sr_ready(9)spi_nor_use_parallel_locking(9)spi_nor_ready(9)spi_nor_wait_till_ready_with_timeout(9)spi_nor_wait_till_ready(9)spi_nor_global_block_unlock(9)spi_nor_write_sr(9)spi_nor_write_sr1_and_check(9)spi_nor_write_16bit_sr_and_check(9)spi_nor_write_16bit_cr_and_check(9)spi_nor_write_16bit_sr_cr_and_check(9)spi_nor_write_sr_and_check(9)spi_nor_write_sr_cr_and_check(9)spi_nor_read_sr2(9)spi_nor_erase_die(9)spi_nor_div_by_erase_size(9)spi_nor_find_best_erase_type(9)spi_nor_init_erase_cmd(9)spi_nor_destroy_erase_cmd_list(9)spi_nor_init_erase_cmd_list(9)spi_nor_erase_multi_sectors(9)spi_nor_sr1_bit6_quad_enable(9)spi_nor_sr2_bit1_quad_enable(9)spi_nor_sr2_bit7_quad_enable(9)spi_nor_spimem_check_read_pp_op(9)spi_nor_spimem_check_readop(9)spi_nor_spimem_check_pp(9)spi_nor_spimem_adjust_hwcaps(9)spi_nor_set_erase_type(9)spi_nor_mask_erase_type(9)spi_nor_init_uniform_erase_map(9)spi_nor_select_uniform_erase(9)spi_nor_manufacturer_init_params(9)spi_nor_no_sfdp_init_params(9)spi_nor_init_flags(9)spi_nor_init_fixup_flags(9)spi_nor_late_init_params(9)spi_nor_sfdp_init_params_deprecated(9)spi_nor_init_params_deprecated(9)spi_nor_init_default_params(9)spi_nor_init_params(9)spi_nor_quad_enable(9)spi_nor_set_4byte_addr_mode(9)spi_nor_soft_reset(9)
all sixty-two of them, present and accounted for, not a single one dropped, we do not ghost functions in this house π β¨
lowkey remember: sr2 has to point at a DMA-able buffer. that's not me being dramatic, that's just how it is π
okay that's the whole page bestie, go write yourself some Status Register 2 πΈ this masterclass in SPI NOR excellence comes courtesy of ./drivers/mtd/spi-nor, stamped October 2026 β and yes, spi_nor_write_sr2(9) is the main character of this manual, as she should be πππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms