spi_nor_set_...dr_mode_brwr(9)

📦 version 7.3.1, in nixpkgs unstable

✨ NAME ✨

spi_nor_set_4byte_addr_mode_brwr — bestie, this is the one that sets 4-byte address mode using SPINOR_OP_BRWR. It's your go-to for Spansion flashes, typically. 💅

🌸 SYNOPSIS 🌸

int spi_nor_set_4byte_addr_mode_brwr (struct spi_nor *nor , bool enable );

🎀 ARGUMENTS 🎀

  • nor — pointer to struct spi_nor. Your whole vibe, the flash struct itself.
  • enable — true to enter the 4-byte address mode, false to exit the 4-byte address mode. That's it, that's the toggle 🫶

🧚 DESCRIPTION 🧚

okay so picture an 8-bit volatile bank register, right? Its whole job is defining the A[30:A24] bits. The MSB (that's bit[7]) is the icon that enables/disables 4-byte address mode 👑

When MSB is set to '1', 4-byte address mode is active, and the A[30:24] bits are don't care — literally they don't matter, they're just vibing 💀

The write instruction in question is SPINOR_OP_BRWR(17h), and it goes out with 1 byte of data. No cap, that's the whole protocol.

🔥 RETURN 🔥

  • 0 on success ✨
  • -errno otherwise 😭

🦋 SEE ALSO 🦋

Also, the kernel file is ./drivers/mtd/spi-nor/core.c — here's the whole friend group, no one gets left out:

and that's the whole page bestie, mwah 💋

ok so tiny sign-off: this one lives under ./drivers/mtd/spi-nor in the Kernel API Manual, dated October 2026. screenshot it, bookmark it, tattoo it idk 🎀🌸✨

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