spi_nor_writ...sr_and_check(9)
π NAME π
spi_nor_write_16bit_sr_and_check β writes the Status Register 1 and the Status Register 2 in one single shot, bestie. It also double-checks that the byte you wrote into Status Register 1 actually matches the value that came back, and that the 16-bit Write didn't mess with whatever was already chilling in Status Register 2. β¨
(this lives in the Kernel API Manual, and no, the title up there got truncated by the man page tooling, not by me π)
β¨ SYNOPSIS β¨
int spi_nor_write_16bit_sr_and_check (struct spi_nor *nor , u8 sr1 );
π ARGUMENTS π
norβ pointer to astruct spi_nor. That's the NOR flash device struct, the main character of the whole operation π«Άsr1β byte value to be written to the Status Register 1. Just au8, one byte, that's the vibe.
πΈ RETURN πΈ
0 on success, -errno otherwise. So if you get zero, slay π₯. If you get an -errno, something went sideways and the error code will tell you what. π
π¦ SEE ALSO π¦
Okay so this function has so many cousins, lowkey a whole family reunion. All of these live in the kernel file ./drivers/mtd/spi-nor/core.c π§
spi_nor_get_cmd_ext(9)spi_nor_spimem_setup_op(9)spi_nor_spimem_bounce(9)spi_nor_spimem_exec_op(9)spi_nor_spimem_read_data(9)spi_nor_read_data(9)spi_nor_spimem_write_data(9)spi_nor_write_data(9)spi_nor_read_any_reg(9)spi_nor_write_any_volatile_reg(9)spi_nor_write_enable(9)spi_nor_write_disable(9)spi_nor_read_id(9)spi_nor_read_sr(9)spi_nor_read_cr(9)spi_nor_set_4byte_addr_mode_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_brwr(9)spi_nor_sr_ready(9)spi_nor_use_parallel_locking(9)spi_nor_ready(9)spi_nor_wait_till_ready_with_timeout(9)spi_nor_wait_till_ready(9)spi_nor_global_block_unlock(9)spi_nor_write_sr(9)spi_nor_write_sr1_and_check(9)spi_nor_write_16bit_cr_and_check(9)spi_nor_write_16bit_sr_cr_and_check(9)spi_nor_write_sr_and_check(9)spi_nor_write_sr_cr_and_check(9)spi_nor_write_sr2(9)spi_nor_read_sr2(9)spi_nor_erase_die(9)spi_nor_div_by_erase_size(9)spi_nor_find_best_erase_type(9)spi_nor_init_erase_cmd(9)spi_nor_destroy_erase_cmd_list(9)spi_nor_init_erase_cmd_list(9)spi_nor_erase_multi_sectors(9)spi_nor_sr1_bit6_quad_enable(9)spi_nor_sr2_bit1_quad_enable(9)spi_nor_sr2_bit7_quad_enable(9)spi_nor_spimem_check_read_pp_op(9)spi_nor_spimem_check_readop(9)spi_nor_spimem_check_pp(9)spi_nor_spimem_adjust_hwcaps(9)spi_nor_set_erase_type(9)spi_nor_mask_erase_type(9)spi_nor_init_uniform_erase_map(9)spi_nor_select_uniform_erase(9)spi_nor_manufacturer_init_params(9)spi_nor_no_sfdp_init_params(9)spi_nor_init_flags(9)spi_nor_init_fixup_flags(9)spi_nor_late_init_params(9)spi_nor_sfdp_init_params_deprecated(9)spi_nor_init_params_deprecated(9)spi_nor_init_default_params(9)spi_nor_init_params(9)spi_nor_quad_enable(9)spi_nor_set_4byte_addr_mode(9)spi_nor_soft_reset(9)
Not me listing all 62 of them π but like, completeness is the whole point, periodt. π
Real talk: all of those references point at the SPI-NOR core stuff in the kernel source at ./drivers/mtd/spi-nor, so if you wanna go read the actual code, that's where the party is at π₯
./drivers/mtd/spi-nor β’ October 2026 β’ spi_nor_writ...sr_and_check(9) β mwah, that's the page, hope it ate ππβ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms