spi_nor_write_sr_and_check(9)
π spi_nor_write_sr_and_check β from the Kernel API Manual, bestie
okay so picture this: we're in the kernel, we're in the SPI NOR flash zone, and we need to write Status Register 1 and then actually make sure it stuck. That's the whole gig. This function writes Status Register 1 and guarantees the byte we wrote matches the value the chip sent back β and it does all of that without touching the other bits in Status Register 1 and 2. No collateral damage, no drama. π
β¨ SYNOPSIS β¨
int spi_nor_write_sr_and_check (struct spi_nor *nor , u8 sr1 );
π ARGUMENTS π
norβ pointer to astruct spi_nor. Your ride, your flash context, your main character. π¦sr1β the byte value to be written to the Status Register. That's the actual content going in, so choose it thoughtfully bestie π
πΈ RETURN πΈ
0 on success, -errno otherwise. So if it comes back 0, we slayed. Anything negative? That's the kernel handing you an error code, go read it. π
π₯ SEE ALSO π₯
The manpage is literally hosted in the Kernel file ./drivers/mtd/spi-nor/core.c, and wow, the friend group is large. Here's everyone:
spi_nor_get_cmd_ext(9)spi_nor_spimem_setup_op(9)spi_nor_spimem_bounce(9)spi_nor_spimem_exec_op(9)spi_nor_spimem_read_data(9)spi_nor_read_data(9)spi_nor_spimem_write_data(9)spi_nor_write_data(9)spi_nor_read_any_reg(9)spi_nor_write_any_volatile_reg(9)spi_nor_write_enable(9)spi_nor_write_disable(9)spi_nor_read_id(9)spi_nor_read_sr(9)spi_nor_read_cr(9)spi_nor_set_4byte_addr_mode_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_brwr(9)spi_nor_sr_ready(9)spi_nor_use_parallel_locking(9)spi_nor_ready(9)spi_nor_wait_till_ready_with_timeout(9)spi_nor_wait_till_ready(9)spi_nor_global_block_unlock(9)spi_nor_write_sr(9)spi_nor_write_sr1_and_check(9)spi_nor_write_16bit_sr_and_check(9)spi_nor_write_16bit_cr_and_check(9)spi_nor_write_16bit_sr_cr_and_check(9)spi_nor_write_sr_cr_and_check(9)spi_nor_write_sr2(9)spi_nor_read_sr2(9)spi_nor_erase_die(9)spi_nor_div_by_erase_size(9)spi_nor_find_best_erase_type(9)spi_nor_init_erase_cmd(9)spi_nor_destroy_erase_cmd_list(9)spi_nor_init_erase_cmd_list(9)spi_nor_erase_multi_sectors(9)spi_nor_sr1_bit6_quad_enable(9)spi_nor_sr2_bit1_quad_enable(9)spi_nor_sr2_bit7_quad_enable(9)spi_nor_spimem_check_read_pp_op(9)spi_nor_spimem_check_readop(9)spi_nor_spimem_check_pp(9)spi_nor_spimem_adjust_hwcaps(9)spi_nor_set_erase_type(9)spi_nor_mask_erase_type(9)spi_nor_init_uniform_erase_map(9)spi_nor_select_uniform_erase(9)spi_nor_manufacturer_init_params(9)spi_nor_no_sfdp_init_params(9)spi_nor_init_flags(9)spi_nor_init_fixup_flags(9)spi_nor_late_init_params(9)spi_nor_sfdp_init_params_deprecated(9)spi_nor_init_params_deprecated(9)spi_nor_init_default_params(9)spi_nor_init_params(9)spi_nor_quad_enable(9)spi_nor_set_4byte_addr_mode(9)spi_nor_soft_reset(9)
π real talk: read the return value.0means the byte matched and the bits stayed untouched.-errnomeans something went sideways and you should go find out what. don't just ignore it and hope. π
okay that's the whole page, no notes. this little gem lives over in ./drivers/mtd/spi-nor, dated October 2026, and it's the spi_nor_write_sr_and_check(9) entry from the Kernel API Manual. go forth and write your status registers responsibly, bestie π«Άβ¨π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms