spi_nor_sr1_..._quad_enable(9)
β¨ NAME β¨
okay so you're on the spi_nor_sr1_..._quad_enable(9) page from the Kernel API Manual, and bestie, it's giving very specific flash-bit energy π
spi_nor_sr1_bit6_quad_enable β set the Quad Enable BIT(6) in the Status Register 1. periodt.
πΈ SYNOPSIS πΈ
int spi_nor_sr1_bit6_quad_enable (struct spi_nor *nor );
π ARGUMENTS π
norβ pointer to astruct spi_nor. literally that's the whole argument, bestie π«Ά
π¦ DESCRIPTION π¦
Bit 6 of the Status Register 1 is the QE bit for Macronix like QSPI memories. that's the entire lore β¨
π RETURN π
0 on success, -errno otherwise. so iconic when it's 0, ngl π
π₯ SEE ALSO π₯
the whole bestie network π
- Kernel file
./drivers/mtd/spi-nor/core.c spi_nor_get_cmd_ext(9)spi_nor_spimem_setup_op(9)spi_nor_spimem_bounce(9)spi_nor_spimem_exec_op(9)spi_nor_spimem_read_data(9)spi_nor_read_data(9)spi_nor_spimem_write_data(9)spi_nor_write_data(9)spi_nor_read_any_reg(9)spi_nor_write_any_volatile_reg(9)spi_nor_write_enable(9)spi_nor_write_disable(9)spi_nor_read_id(9)spi_nor_read_sr(9)spi_nor_read_cr(9)spi_nor_set_4byte_addr_mode_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)spi_nor_set_4byte_addr_mode_brwr(9)spi_nor_sr_ready(9)spi_nor_use_parallel_locking(9)spi_nor_ready(9)spi_nor_wait_till_ready_with_timeout(9)spi_nor_wait_till_ready(9)spi_nor_global_block_unlock(9)spi_nor_write_sr(9)spi_nor_write_sr1_and_check(9)spi_nor_write_16bit_sr_and_check(9)spi_nor_write_16bit_cr_and_check(9)spi_nor_write_16bit_sr_cr_and_check(9)spi_nor_write_sr_and_check(9)spi_nor_write_sr_cr_and_check(9)spi_nor_write_sr2(9)spi_nor_read_sr2(9)spi_nor_erase_die(9)spi_nor_div_by_erase_size(9)spi_nor_find_best_erase_type(9)spi_nor_init_erase_cmd(9)spi_nor_destroy_erase_cmd_list(9)spi_nor_init_erase_cmd_list(9)spi_nor_erase_multi_sectors(9)spi_nor_sr2_bit1_quad_enable(9)spi_nor_sr2_bit7_quad_enable(9)spi_nor_spimem_check_read_pp_op(9)spi_nor_spimem_check_readop(9)spi_nor_spimem_check_pp(9)spi_nor_spimem_adjust_hwcaps(9)spi_nor_set_erase_type(9)spi_nor_mask_erase_type(9)spi_nor_init_uniform_erase_map(9)spi_nor_select_uniform_erase(9)spi_nor_manufacturer_init_params(9)spi_nor_no_sfdp_init_params(9)spi_nor_init_flags(9)spi_nor_init_fixup_flags(9)spi_nor_late_init_params(9)spi_nor_sfdp_init_params_deprecated(9)spi_nor_init_params_deprecated(9)spi_nor_init_default_params(9)spi_nor_init_params(9)spi_nor_quad_enable(9)spi_nor_set_4byte_addr_mode(9)spi_nor_soft_reset(9)
mwah π this page came from source/version ./drivers/mtd/spi-nor, dated October 2026, and yes that's the cute sign-off, bestie π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms