spi_nor_sr1_..._quad_enable(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so you're on the spi_nor_sr1_..._quad_enable(9) page from the Kernel API Manual, and bestie, it's giving very specific flash-bit energy πŸ’…

spi_nor_sr1_bit6_quad_enable β€” set the Quad Enable BIT(6) in the Status Register 1. periodt.


🌸 SYNOPSIS 🌸

int spi_nor_sr1_bit6_quad_enable (struct spi_nor *nor );

πŸŽ€ ARGUMENTS πŸŽ€

  • nor β€” pointer to a struct spi_nor. literally that's the whole argument, bestie 🫢

πŸ¦‹ DESCRIPTION πŸ¦‹

Bit 6 of the Status Register 1 is the QE bit for Macronix like QSPI memories. that's the entire lore ✨


πŸ’– RETURN πŸ’–

0 on success, -errno otherwise. so iconic when it's 0, ngl 😭


πŸ”₯ SEE ALSO πŸ”₯

the whole bestie network πŸ’…


mwah πŸ’– this page came from source/version ./drivers/mtd/spi-nor, dated October 2026, and yes that's the cute sign-off, bestie πŸŽ€

πŸ“¦ where this page comes from