spi_nor_parse_bfpt(9)

📦 version 7.3.1, in nixpkgs unstable

💅 spi_nor_parse_bfpt(9) — like, the Kernel API Manual page, bestie ✨

okay so this is a page from the Kernel API Manual and it's about spi_nor_parse_bfpt — which literally reads and parses the Basic Flash Parameter Table. yes that's a mouthful, we'll get there 🎀

✨ NAME ✨

spi_nor_parse_bfpt — read and parse the Basic Flash Parameter Table 💖

🌸 SYNOPSIS 🌸

int spi_nor_parse_bfpt (struct spi_nor *nor , const struct
       sfdp_parameter_header *bfpt_header );

like, it takes two things and returns an int, that's the whole vibe 🦋

🎀 ARGUMENTS 🎀

  • nor — pointer to a 'struct spi_nor' 💫
  • bfpt_header — pointer to the 'struct sfdp_parameter_header' that's describing the Basic Flash Parameter Table's length and version 👑

🔥 DESCRIPTION 🔥

okay so picture this: the Basic Flash Parameter Table is the main and only mandatory table as defined by the SFDP (JESD216) specification. like, it's the main character, there is no skipping it 💅

what it gives us:

  • the total size (memory density) of the data array 📏
  • the number of address bytes for Fast Read, Page Program and Sector Erase commands 🧮

and for Fast READ commands, it also hands us the number of mode clock cycles and wait states — all regrouped into the number of dummy clock cycles — for each supported instruction op code ⏱️✨

for Page Program, the page size is now available since JESD216 rev A 🎉 but the supported instruction op codes are still not provided, which is giving unfinished business ngl 🙈

for Sector Erase commands, this table stores the supported instruction op codes and the associated sector sizes 🗂️

and finally (yes there's more, she's thorough 💅): the Quad Enable Requirements (QER) are also available since JESD216 rev A. The QER bits encode the manufacturer dependent procedure that you have to execute to set the Quad Enable (QE) bit in some internal register of the Quad SPI memory 🔧

fr fr — the QE bit, when it exists, must be set before sending any Quad SPI command to the memory. no skipping ahead bestie 😭

so what's actually happening when you set it? setting the QE bit tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2 and IO3 — hence enabling 4 (Quad) I/O lines 🌈 slay.

⭐ RETURN ⭐

0 on success, -errno otherwise. that's it, that's the return 😌

🦋 SEE ALSO 🦋

kernel file ./drivers/mtd/spi-nor/sfdp.c 👀 plus the whole friend group:

okay and before you go — cute lil sign-off 💖 this page lives in ./drivers/mtd/spi-nor and it's dated October 2026. go read the source, ily, bye 🫶✨

📦 where this page comes from