spi_nor_set_...en_en4b_ex4b(9)

💅 spi_nor_set_4byte_addr_mode_wren_en4b_ex4b — a Kernel API Manual moment

okay so this is a page from the Kernel API Manual, bestie, and it's about one extremely specific little function that flips your SPI NOR flash into 4-byte address mode. Let's get into it ✨

✨ NAME ✨

spi_nor_set_4byte_addr_mode_wren_en4b_ex4b — Set 4-byte address mode using SPINOR_OP_WREN followed by SPINOR_OP_EN4B or SPINOR_OP_EX4B. Typically used by ST and Micron flashes. 🎀

Like, that's the whole vibe: write enable first, then the enter/exit op. Order matters, no cap.

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🌸 SYNOPSIS 🌸

int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b (struct spi_nor *nor ,
bool enable );

🦋 ARGUMENTS 🦋

• nor — pointer to struct spi_nor. Yep, the usual suspect, your flash chip's whole personality in one struct 💖
• enable — true to enter the 4-byte address mode, false to exit the 4-byte address mode. Binary queen, two settings only 👑

⭐ RETURN ⭐

0 on success, -errno otherwise. So if it's not zero, something went sideways — check that errno, bestie, it's telling you something fr fr 😭

🔥 SEE ALSO 🔥

literally the entire friend group, here we go, main character energy all around:

• spi_nor_get_cmd_ext(9)
• spi_nor_spimem_setup_op(9)
• spi_nor_spimem_bounce(9)
• spi_nor_spimem_exec_op(9)
• spi_nor_spimem_read_data(9)
• spi_nor_read_data(9)
• spi_nor_spimem_write_data(9)
• spi_nor_write_data(9)
• spi_nor_read_any_reg(9)
• spi_nor_write_any_volatile_reg(9)
• spi_nor_write_enable(9)
• spi_nor_write_disable(9)
• spi_nor_read_id(9)
• spi_nor_read_sr(9)
• spi_nor_read_cr(9)
• spi_nor_set_4byte_addr_mode_en4b_ex4b(9)
• spi_nor_set_4byte_addr_mode_brwr(9)
• spi_nor_sr_ready(9)
• spi_nor_use_parallel_locking(9)
• spi_nor_ready(9)
• spi_nor_wait_till_ready_with_timeout(9)
• spi_nor_wait_till_ready(9)
• spi_nor_global_block_unlock(9)
• spi_nor_write_sr(9)
• spi_nor_write_sr1_and_check(9)
• spi_nor_write_16bit_sr_and_check(9)
• spi_nor_write_16bit_cr_and_check(9)
• spi_nor_write_16bit_sr_cr_and_check(9)
• spi_nor_write_sr_and_check(9)
• spi_nor_write_sr_cr_and_check(9)
• spi_nor_write_sr2(9)
• spi_nor_read_sr2(9)
• spi_nor_erase_die(9)
• spi_nor_div_by_erase_size(9)
• spi_nor_find_best_erase_type(9)
• spi_nor_init_erase_cmd(9)
• spi_nor_destroy_erase_cmd_list(9)
• spi_nor_init_erase_cmd_list(9)
• spi_nor_erase_multi_sectors(9)
• spi_nor_sr1_bit6_quad_enable(9)
• spi_nor_sr2_bit1_quad_enable(9)
• spi_nor_sr2_bit7_quad_enable(9)
• spi_nor_spimem_check_read_pp_op(9)
• spi_nor_spimem_check_readop(9)
• spi_nor_spimem_check_pp(9)
• spi_nor_spimem_adjust_hwcaps(9)
• spi_nor_set_erase_type(9)
• spi_nor_mask_erase_type(9)
• spi_nor_init_uniform_erase_map(9)
• spi_nor_select_uniform_erase(9)
• spi_nor_manufacturer_init_params(9)
• spi_nor_no_sfdp_init_params(9)
• spi_nor_init_flags(9)
• spi_nor_init_fixup_flags(9)
• spi_nor_late_init_params(9)
• spi_nor_sfdp_init_params_deprecated(9)
• spi_nor_init_params_deprecated(9)
• spi_nor_init_default_params(9)
• spi_nor_init_params(9)
• spi_nor_quad_enable(9)
• spi_nor_set_4byte_addr_mode(9)
• spi_nor_soft_reset(9)

Also, the kernel file it lives in: ./drivers/mtd/spi-nor/core.c — that's the address, don't lose it 🫶

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quick vibe check: the whole trick of this function is that SPINOR_OP_WREN has to go out before SPINOR_OP_EN4B (enter) or SPINOR_OP_EX4B (exit). That's not a suggestion, that's the bit that makes it work 💀

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and that's the page, bestie 🌈 this was the Kernel API Manual entry for spi_nor_set_...en_en4b_ex4b(9), sourced from ./drivers/mtd/spi-nor, dated October 2026 — mwah, go flash something responsibly 💜🧚