spi_nor_spim...djust_hwcaps(9)

💅 spi_nor_spimem_adjust_hwcaps(9) — a whole vibe, from the Kernel API Manual

okay so bestie, welcome to the spi_nor_spimem_adjust_hwcaps(9) page ✨ it lives in the Kernel API Manual and it is, and i cannot stress this enough, the moment where your SPI controller and your flash chip finally sit down and figure out what protocol they're actually doing together. no cap.

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✨ NAME ✨

spi_nor_spimem_adjust_hwcaps — find the optimal Read/Write protocol based on SPI controller capabilities 🎀

like, the optimal one. the main character protocol. 👑

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🌸 SYNOPSIS 🌸

void spi_nor_spimem_adjust_hwcaps (struct spi_nor *nor , u32 *hwcaps );

that's it. one void, two pointers, zero drama (the good kind of zero). 💅

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🦋 ARGUMENTS 🦋

• nor — pointer to a struct spi_nor 🫶 the flash's whole little profile, basically.
• hwcaps — pointer to the resulting capabilities after adjusting according to the controller's and the flash's capability. so this bad boy goes in, gets vibe-checked against both sides, and comes back out holding the results. ✨

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🔥 SEE ALSO 🔥

okay this is the part where i need you to stay with me because the list is long and every single one of them is here, no skips, no "etc.", i would never 😭

the kernel file is ./drivers/mtd/spi-nor/core.c — that's home base. 🏠

• spi_nor_get_cmd_ext(9)
• spi_nor_spimem_setup_op(9)
• spi_nor_spimem_bounce(9)
• spi_nor_spimem_exec_op(9)
• spi_nor_spimem_read_data(9)
• spi_nor_read_data(9)
• spi_nor_spimem_write_data(9)
• spi_nor_write_data(9)
• spi_nor_read_any_reg(9)
• spi_nor_write_any_volatile_reg(9)
• spi_nor_write_enable(9)
• spi_nor_write_disable(9)
• spi_nor_read_id(9)
• spi_nor_read_sr(9)
• spi_nor_read_cr(9)
• spi_nor_set_4byte_addr_mode_en4b_ex4b(9)
• spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(9)
• spi_nor_set_4byte_addr_mode_brwr(9)
• spi_nor_sr_ready(9)
• spi_nor_use_parallel_locking(9)
• spi_nor_ready(9)
• spi_nor_wait_till_ready_with_timeout(9)
• spi_nor_wait_till_ready(9)
• spi_nor_global_block_unlock(9)
• spi_nor_write_sr(9)
• spi_nor_write_sr1_and_check(9)
• spi_nor_write_16bit_sr_and_check(9)
• spi_nor_write_16bit_cr_and_check(9)
• spi_nor_write_16bit_sr_cr_and_check(9)
• spi_nor_write_sr_and_check(9)
• spi_nor_write_sr_cr_and_check(9)
• spi_nor_write_sr2(9)
• spi_nor_read_sr2(9)
• spi_nor_erase_die(9)
• spi_nor_div_by_erase_size(9)
• spi_nor_find_best_erase_type(9)
• spi_nor_init_erase_cmd(9)
• spi_nor_destroy_erase_cmd_list(9)
• spi_nor_init_erase_cmd_list(9)
• spi_nor_erase_multi_sectors(9)
• spi_nor_sr1_bit6_quad_enable(9)
• spi_nor_sr2_bit1_quad_enable(9)
• spi_nor_sr2_bit7_quad_enable(9)
• spi_nor_spimem_check_read_pp_op(9)
• spi_nor_spimem_check_readop(9)
• spi_nor_spimem_check_pp(9)
• spi_nor_set_erase_type(9)
• spi_nor_mask_erase_type(9)
• spi_nor_init_uniform_erase_map(9)
• spi_nor_select_uniform_erase(9)
• spi_nor_manufacturer_init_params(9)
• spi_nor_no_sfdp_init_params(9)
• spi_nor_init_flags(9)
• spi_nor_init_fixup_flags(9)
• spi_nor_late_init_params(9)
• spi_nor_sfdp_init_params_deprecated(9)
• spi_nor_init_params_deprecated(9)
• spi_nor_init_default_params(9)
• spi_nor_init_params(9)
• spi_nor_quad_enable(9)
• spi_nor_set_4byte_addr_mode(9)
• spi_nor_soft_reset(9)

see? told you. all of them. ate and left no crumbs 💀🍓

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okay and before you go — this whole page came from ./drivers/mtd/spi-nor, dated October 2026, and it answers to the name spi_nor_spim...djust_hwcaps(9). that's the source, that's the version, that's the footer, and honestly? iconic. 🧚‍♀️🌈⭐