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S (continued)

struct rtnl_link_stats64(9)The main device statistics structure.✨
struct rtnl_msg_handler(9)rtnetlink message type and handlers✨
struct rtnl_newlink_params(9)parameters of rtnl_link_ops::newlink()✨
struct rtrs_addr(9)Source and destination address of a path to be established✨
struct rtrs_attrs(9)RTRS session attributes✨
struct rtrs_clt_ops(9)it holds the link event callback and private pointer.✨
struct rtrs_clt_req_ops(9)it holds the request confirmation callback and a private pointer.✨
struct rtrs_msg_conn_req(9)Client connection request to the server✨
struct rtrs_msg_conn_rsp(9)Server connection response to the client✨
struct rtrs_msg_info_req(9)client additional info request✨
struct rtrs_msg_info_rsp(9)server additional info response✨
struct rtrs_msg_rdma_hdr(9)header for read or write request✨
struct rtrs_msg_rdma_read(9)RDMA data transfer request from client✨
struct rtrs_msg_rdma_write(9)Message transferred to server with RDMA- Write✨
struct rtrs_msg_rkey_rsp(9)server refreshed rkey response✨
struct rtrs_sg_desc(9)RDMA-Buffer entry description✨
struct rvin_dev(9)Renesas VIN device structure✨
struct rvin_group(9)VIN CSI2 group information✨
struct rvin_group_route(9)describes a route from a channel of a CSI-2 receiver to a VIN✨
struct rvin_info(9)Information about the particular VIN implementation✨
struct rvin_parallel_entity(9)Parallel video input endpoint descriptor✨
struct rvin_video_format(9)Data format stored in memory✨
struct rvt_krwq(9)kernel struct receive work request✨
struct rvt_operation_params(9)op table entry✨
struct rvt_qp_iter(9)the iterator for QPs✨
struct rvt_ud_wr(9)IB UD work plus AH cache✨
struct rx_ctl_mach(9)rx activities record✨
struct rxdone_entry_desc(9)RX Entry descriptor✨
struct rz_mtu3(9)MTU3 core private data✨
struct rz_mtu3_channel(9)MTU3 channel private data✨
struct rz_mtu3_channel_io_map(9)MTU3 pwm channel map✨
struct rz_mtu3_cnt(9)MTU3 counter private data✨
struct rz_mtu3_pwm_channel(9)MTU3 pwm channel data✨
struct rz_mtu3_pwm_chip(9)MTU3 pwm private data✨
struct rz_sysc(9)RZ SYSC private data structure✨
struct rz_sysc_init_data(9)RZ SYSC initialization data✨
struct rza1_mux_conf(9)describes a pin multiplexing operation✨
struct rza1_pinctrl(9)RZ pincontroller device✨
struct rza1_port(9)describes a pin port✨
struct rzg2l_adc_channel(9)ADC channel descriptor✨
struct rzg2l_adc_hw_params(9)ADC hardware specific parameters✨
struct rzg2l_cpg_info(9)SoC-specific CPG Description✨
struct rzg2l_cpg_priv(9)Clock Pulse Generator Private Data✨
struct rzg2l_cru_dev(9)Renesas CRU device structure✨
struct rzg2l_cru_ip_format(9)CRU IP format✨
struct rzg2l_du_crtc(9)the CRTC, representing a DU superposition processor✨
struct rzg2l_du_crtc_state(9)Driver-specific CRTC state✨
struct rzg2l_du_vsp_plane_state(9)Driver-specific plane state✨
struct rzg2l_hw_info(9)Interrupt Control Unit controller hardware info structure.✨
struct rzg2l_hwcfg(9)hardware configuration data structure✨
struct rzg2l_irqc_priv(9)IRQ controller private data structure✨
struct rzg2l_irqc_reg_cache(9)registers cache (necessary for suspend/resume)✨
struct rzg2l_mod_clk(9)Module Clocks definitions✨
struct rzg2l_pinctrl_pin_settings(9)pin data✨
struct rzg2l_pinctrl_reg_cache(9)register cache structure (to be used in suspend/resume)✨
struct rzg2l_register_offsets(9)specific register offsets✨
struct rzg2l_reset(9)Reset definitions✨
struct rzg3e_thermal_priv(9)RZ/G3E TSU private data✨
struct rzg3s_pcie_host(9)RZ/G3S PCIe data structure✨
struct rzg3s_pcie_msi(9)RZ/G3S PCIe MSI data structure✨
struct rzg3s_pcie_port(9)RZ/G3S PCIe Root Port data structure✨
struct rzg3s_pcie_soc_data(9)SoC specific data✨
struct rzg3s_sysc(9)RZ/G3S System Controller descriptor✨
struct rzg3s_sysc_function(9)System Controller function descriptor✨
struct rzg3s_sysc_info(9)RZ/G3S System Controller info✨
struct rzg3s_thermal_priv(9)RZ/G3S thermal private data structure✨
struct rzn1_pin_group(9)describes an rzn1 pin group✨
struct rzn1_pmx_func(9)describes rzn1 pinmux functions✨
struct rzv2h_cpg_info(9)SoC-specific CPG Description✨
struct rzv2h_cpg_pd(9)RZ/V2H power domain data structure✨
struct rzv2h_cpg_priv(9)Clock Pulse Generator Private Data✨
struct rzv2h_ff_mod_status_clk(9)Fixed Factor Module Status Clock✨
struct rzv2h_hw_info(9)Interrupt Control Unit controller hardware info structure.✨
struct rzv2h_icu_priv(9)Interrupt Control Unit controller private data structure.✨
struct rzv2h_irqc_reg_cache(9)registers cache (necessary for suspend/resume)✨
struct rzv2h_mipi_dsi_timings(9)Timing parameter table structure✨
struct rzv2h_mod_clk(9)Module Clocks definitions✨
struct rzv2h_pll_div_pars(9)PLL parameters with post-divider✨
struct rzv2h_pll_dsi_info(9)PLL DSI information, holds the limits and parameters✨
struct rzv2h_pll_limits(9)PLL parameter constraints✨
struct rzv2h_pll_pars(9)PLL configuration parameters✨
struct rzv2h_plldsi_div_clk(9)PLL DSI DDIV clock✨
struct rzv2h_plldsi_mux_clk(9)PLL DSI MUX clock✨
struct rzv2h_reset(9)Reset definitions✨
struct s32_pin_group(9)describes an S32 pin group✨
struct s32_pin_range(9)pin ID range for each memory region.✨
struct s3c2410_platform_i2c(9)Platform data for s3c I2C.✨
struct s3c2410_wdt_variant(9)Per-variant config data✨
struct s3c64xx_eint0_data(9)EINT0 common data✨
struct s3c64xx_eint0_domain_data(9)EINT0 per-domain data✨
struct s3c64xx_eint_gpio_data(9)GPIO EINT data✨
struct s3c64xx_spi_csinfo(9)ChipSelect description✨
struct s3c64xx_spi_driver_data(9)Runtime info holder for SPI driver.✨
struct s3c64xx_spi_info(9)SPI Controller defining structure✨
struct s3c64xx_spi_port_config(9)SPI Controller hardware info✨
struct s3c_audio_pdata(9)common platform data for audio device drivers✨
struct s3c_camif_sensor_info(9)an image sensor description✨
struct s3c_camif_variant(9)CAMIF variant structure✨
struct s3c_fb(9)overall hardware state of the hardware✨
struct s3c_fb_driverdata(9)per-device type driver data for init time.✨
struct s3c_fb_palette(9)palette information✨
struct s3c_fb_pd_win(9)per window setup data✨
struct s3c_fb_platdata(9)S3C driver platform specific information✨
struct s3c_fb_variant(9)fb variant information✨
struct s3c_fb_vsync(9)vsync information✨
struct s3c_fb_win(9)per window private data for each framebuffer.✨
struct s3c_fb_win_variant(9)✨
struct s3c_pcm_info(9)S3C PCM Controller information✨
struct s3c_sdhci_platdata(9)Platform device data for Samsung SDHCI✨
struct s5k6a3(9)fimc-is sensor data structure✨
struct s5p_aes_dev(9)Crypto device state container✨
struct s5p_hash_ctx(9)HASH transformation context✨
struct s5p_hash_reqctx(9)HASH request context✨
struct s5p_jpeg(9)JPEG IP abstraction✨
struct s5p_jpeg_addr(9)JPEG converter physical address set for DMA✨
struct s5p_jpeg_buffer(9)description of memory containing input JPEG data✨
struct s5p_jpeg_ctx(9)the device context data✨
struct s5p_jpeg_fmt(9)driver's internal color format data✨
struct s5p_jpeg_marker(9)collection of markers from jpeg header✨
struct s5p_jpeg_q_data(9)parameters of one queue✨
struct s5p_mfc_ctx(9)This struct contains the instance context✨
struct s5p_mfc_dev(9)The struct containing driver internal parameters.✨
struct s5p_mfc_priv_buf(9)represents internal used buffer✨
struct s626_private(9)Working data for s626 driver.✨
struct sa_alg_tmpl(9)A generic template encompassing crypto/aead algorithms✨
struct sa_cmdl_cfg(9)Command label configuration descriptor✨
struct sa_cmdl_param_info(9)Command label parameters info✨
struct sa_cmdl_upd_info(9)Command label updation info✨
struct sa_crypto_data(9)Crypto driver instance data✨
struct sa_ctx_info(9)SA context information✨
struct sa_eng_info(9)Security accelerator engine info✨
struct sa_mapped_sg(9)scatterlist information for tx and rx✨
struct sa_path_rec_roce(9)RoCE specific portion of the path record entry✨
struct sa_req(9)SA request definition✨
struct sa_rx_data(9)RX Packet miscellaneous data place holder✨
struct sa_sha_req_ctx(9)Structure used for sha request✨
struct sa_tfm_ctx(9)TFM context structure✨
struct saa7115_platform_data(9)Allow overriding default initialization✨
struct sample(9)Store performance sample✨
struct samsung_aes_variant(9)platform specific SSS driver data✨
struct samsung_clk_provider(9)information about clock provider✨
struct samsung_clk_reg_dump(9)register dump of clock controller registers✨
struct samsung_clock_alias(9)information about mux clock✨
struct samsung_cmu_info(9)all clocks information needed for CMU registration✨
struct samsung_div_clock(9)information about div clock✨
struct samsung_fixed_factor_clock(9)information about fixed-factor clock✨
struct samsung_fixed_rate_clock(9)information about fixed-rate clock✨
struct samsung_gate_clock(9)information about gate clock✨
struct samsung_gpio_cfg(9)✨
struct samsung_gpio_chip(9)wrapper for specific implementation of gpio✨
struct samsung_gpio_pm(9)power management (suspend/resume) information✨
struct samsung_keypad_platdata(9)Platform device data for Samsung Keypad.✨
struct samsung_mux_clock(9)information about mux clock✨
struct samsung_pin_bank(9)represent a controller pin-bank.✨
struct samsung_pin_bank_data(9)represent a controller pin-bank (init data).✨
struct samsung_pin_bank_type(9)pin bank type description✨
struct samsung_pin_ctrl(9)represent a pin controller.✨
struct samsung_pin_group(9)represent group of pins of a pinmux function.✨
struct samsung_pinctrl_drv_data(9)wrapper for holding driver data together.✨
struct samsung_pinctrl_of_match_data(9)OF match device specific configuration data.✨
struct samsung_pll_clock(9)information about pll clock✨
struct samsung_pmx_func(9)represent a pin function.✨
struct samsung_pwm_channel(9)private data of PWM channel✨
struct samsung_pwm_chip(9)private data of PWM chip✨
struct samsung_retention_data(9)represent a pin-bank retention control data.✨
struct samsung_spdif_info(9)Samsung S/PDIF Controller information✨
struct samsung_wakeup_mask(9)wakeup mask information✨
struct san_dgpu_event(9)Discrete GPU ACPI event.✨
struct sata_gemini(9)a state container for a Gemini SATA bridge✨
struct saved_params(9)Static working copies of data from the PS3 'os area'.✨
struct sbi_hart_boot_data(9)Hart specific boot used during booting and cpu hotplug.✨
struct sbitmap(9)Scalable bitmap.✨
struct sbitmap_queue(9)Scalable bitmap with the added ability to wait on free bits.✨
struct sbitmap_word(9)Word in a &struct sbitmap.✨
struct sbq_wait_state(9)Wait queue in a &struct sbitmap_queue.✨
struct sbs_platform_data(9)platform data for sbs devices✨
struct sbsa_gwdt(9)Internal representation of the SBSA GWDT✨
struct sbtsi_data(9)driver private data for an AMD SB-TSI device✨
struct sbtsi_i3c_priv(9)per-device state for I3C SBTSI (includes DMA- safe buffers)✨
struct sc18is602_platform_data(9)sc18is602 info @clock_frequency SC18IS603 oscillator frequency✨
struct sca3000_chip_info(9)model dependent parameters✨
struct sca3000_state(9)device instance state information✨
struct sca3300_data(9)device data✨
struct scan_data(9)data provided to scan callback functions✨
struct sched_ext_ops(9)Operation table for BPF scheduler implementation✨
struct sched_ext_ops_cid(9)cid-form alternative to struct sched_ext_ops✨
struct sched_mm_cid(9)Storage for per task MM CID data✨
struct sci_clk(9)TI SCI clock representation✨
struct sci_clk_provider(9)TI SCI clock provider representation✨
struct sci_phy_properties(9)This structure defines the properties common to all phys that can be retrieved.✨
struct sci_power_control(9)✨
struct sci_remote_node_context(9)This structure contains the data associated with the remote node context object. The remote node context (RNC) object models the the remote device information necessary to manage the silicon RNC.✨
struct sci_remote_node_table(9)✨
struct sci_sas_phy_properties(9)This structure defines the properties, specific to a SAS phy, that can be retrieved.✨
struct sci_sata_phy_properties(9)This structure defines the properties, specific to a SATA phy, that can be retrieved.✨
struct sci_uf_address_table_array(9)✨
struct sci_uf_buffer_array(9)✨
struct sci_uf_header_array(9)✨
struct sci_unsolicited_frame(9)✨
struct sci_unsolicited_frame_control(9)✨