STRUCT RZG2L_PINCTRL_REG_CACHE(9)
π struct rzg2l_pinctrl_reg_cache β Kernel API Manual, bestie edition π
okay so welcome to the Kernel API Manual entry for struct rzg2l_pinctrl_reg_cache(9) β¨ yes the title gets truncated in the header (it's giving struct rzg2l...rl_reg_cache(9), we don't talk about it π) but we're here, we're hydrated, and we're about to learn a struct.
β¨ NAME β¨
struct rzg2l_pinctrl_reg_cache β it's the register cache structure, and its whole personality is that it's to be used in suspend/resume</> π€π«Ά
Like, the kernel goes to sleep and this struct is the one holding onto everybody's values so nothing gets lost. main character energy, honestly π
πΈ SYNOPSIS πΈ
struct rzg2l_pinctrl_reg_cache {
u8 *p;
u16 *pm;
u8 *pmc;
u32 *pfc;
u32 *iolh[2];
u32 *ien[2];
u32 *pupd[2];
u32 *smt[2];
u32 *sr[2];
u32 *nod[2];
u32 clone;
u8 sd_ch[2];
u8 eth_poc[2];
u8 oen;
u8 other_poc;
u8 qspi;
};
no cap, that's the whole struct β every one of those pointers is a little cache with its own vibe, and yes bestie, iolh, ien, pupd, smt, sr and nod are all arrays of 2 π₯ (they said "two of everything" and they meant it).
π Members π
Sit down, grab a strawberry π, we're going through every single one because nobody gets left behind:
pβ the P registers</c> cache πpmβ the PM registers</c> cache (note: this one's au16 *, it's special like that, yk)pmcβ the PMC registers</c> cachepfcβ the PFC registers</c> cacheiolhβ the IOLH registers</l> cache (u32 *iolh[2], two of 'em, always)ienβ the IEN registers</l> cache (u32 *ien[2])pupdβ the PUPD registers</l> cache (u32 *pupd[2]) β say it with me: pull-up pull-down πsmtβ the SMT registers</l> cache (u32 *smt[2])srβ the SR registers</l> cache (u32 *sr[2])nodβ the NOD registers</l> cache (u32 *nod[2])cloneβ the Clone register cache (a plainu32 clone, no pointer, she's lowkey low-maintenance)sd_chβ the SD_CH registers cache (u8 sd_ch[2])eth_pocβ the ET_POC registers cache (u8 eth_poc[2]) β yes the member iseth_pocand the description saysET_POC, that's just how it is, we don't edit the lore π«Άoenβ the Output Enable register cache (u8 oen) β notoen[2], justoen. iconique, inconsistent, obsessed πother_pocβ the OTHER_POC register cache (u8 other_poc)qspiβ the QSPI registers cache (u8 qspi)
fr fr, if you're writing suspend/resume code for this driver, every field above is a thing you have to actually care about. no skipping. iykyk.
π¦ SEE ALSO π¦
go be nosy in the kernel file ./drivers/pinctrl/renesas/pinctrl-rzg2l.c β that's where the whole friend group lives:
struct rzg2l_register_offsets(9)enum rzg2l_iolh_index(9)struct rzg2l_hwcfg(9)struct rzg2l_pinctrl_pin_settings(9)rzg2l_oen_write_with_pwpr(9)
read them all in order, it's a whole saga, you'll be seated for it πΏ
and that's the page!! π this little beauty lives under ./drivers/pinctrl/renesas and the manual says October 2026 β so mark your calendar, screenshot the header, and stan struct rzg2l_pinctrl_reg_cache(9) like the suspend/resume icon it is. mwah πβ¨πβ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms