STRUCT SAMSUNG_GPIO_CHIP(9)
π struct samsung_gpio_chip(9)
okay so bestie, welcome to the Kernel API Manual, and today's main character is literally struct samsung_gpio_chip β¨ she's a wrapper, she's a struct, she's giving "I hold everything together" energy, and by the end of this page you're gonna be obsessed. no cap. π«Ά
πΈ NAME πΈ
struct samsung_gpio_chip β a wrapper for a specific implementation of gpio. that's it, that's the tweet π
β¨ SYNOPSIS β¨
here's the whole vibe, laid out exactly as it lives in the header, bestie β every field, every alignment, nothing skipped π
struct samsung_gpio_chip {
struct gpio_chip chip;
struct samsung_gpio_cfg *config;
struct samsung_gpio_pm *pm;
void __iomem *base;
int irq_base;
int group;
spinlock_t lock;
#ifdef CONFIG_PM;
u32 pm_save[4];
#endif;
u32 bitmap_gpio_int;
};
π Members π
okay these are the squad members, one by one, no one gets left out π
chipβ the chip structure that gets exported via gpiolib. she's the one out here actually being seen in public πconfigβ special function and pull-resistor control information. yes, pull-resistor, she's got range πbaseβ the base pointer to the gpio configuration registers.irq_baseβ the base irq number.groupβ the group register number for gpio interrupt support.lockβ lock for exclusive access to this gpio bank. do not touch without it, fr fr πpm_saveβ save information for suspend/resume support. she literally remembers things so you don't have to πbitmap_gpio_intβ bitmap for representing GPIO interrupt or not. iconic bit-flipping behaviour β
ngl, notice how pm is chillin' up in the SYNOPSIS but the Members list doesn't give her a blurb? that's not me being lazy, that's just how the page is written π keeping it 100% accurate over here.
π₯ Description π₯
so this wrapper provides the necessary information for the Samsung specific gpios being registered with gpiolib. like, she's the little handler that makes sure the Samsung-specific bits get properly introduced to gpiolib. networking but for structs π
the lock protects each gpio bank from multiple access of the shared configuration registers, or from reading of data whilst another thread is writing to the register set. read that again: whilst another thread is writing. so the lock is doing the absolute most and we love her for it π«Ά
each chip has its own lock to avoid any contention between different CPU cores trying to get one lock for different GPIO banks, where each bank of GPIO has its own register space and configuration registers. translation: everybody gets their own lock, nobody's fighting in the group chat over a single shared resource, zero drama, maximum throughput πβ¨
π¦ SEE ALSO π¦
- Kernel file
./arch/arm/mach-s3c/gpio-core.hstruct samsung_gpio_pm(9),samsung_gpiolib_to_irq(9)
go read those next, bestie, iykyk π
π reminder that this is all about shared configuration registers and lock discipline β do NOT go poking atbasewithout respectinglock. that's the whole point. periodt.
and that's the page, bestie π cute little sign-off time: this one's from ./arch/arm/mach-s3c, dated October 2026, and it's literally struct samsung_gpio_chip(9) β same energy, same facts, way more sparkle β¨ππ¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms