STRUCT RZV2H_CPG_PRIV(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so welcome to the Kernel API Manual entry for struct rzv2h_cpg_priv(9), bestie! The name is struct rzv2h_cpg_priv β€” Clock Pulse Generator Private Data. It's giving "the CPG's own private little data bundle," and honestly? iconic. πŸ’…

πŸ¦‹ SYNOPSIS πŸ¦‹

struct rzv2h_cpg_priv {
    struct device *dev;
    void __iomem *base;
    spinlock_t rmw_lock;
    struct clk **clks;
    unsigned int num_core_clks;
    unsigned int num_mod_clks;
    struct rzv2h_reset *resets;
    unsigned int num_resets;
    unsigned int last_dt_core_clk;
    struct clk_ops *ff_mod_status_ops;
    atomic_t *mstop_count;
    struct reset_controller_dev rcdev;
    struct rzv2h_pll_dsi_info pll_dsi_info[MAX_CPG_DSI_PLL];
};

🌸 Members 🌸

  • dev β€” the CPG device. the main-character device reference, periodt.
  • base β€” the CPG register block base address. that's where the registers live, no cap.
  • rmw_lock β€” protects register accesses. it's the read-modify-write bodyguard keeping accesses from stepping on each other.
  • clks β€” Array containing all Core and Module Clocks. literally the whole clock lineup.
  • num_core_clks β€” Number of Core Clocks in clks[]. the headcount for the core-clock section.
  • num_mod_clks β€” Number of Module Clocks in clks[]. the headcount for the module-clock section.
  • resets β€” Array of resets. yep, the reset squad.
  • num_resets β€” Number of Module Resets in info->resets[]. the reset tally.
  • last_dt_core_clk β€” ID of the last Core Clock exported to DT. that's the DT export boundary, bestie.
  • ff_mod_status_ops β€” Fixed Factor Module Status Clock operations. the ops for that clock flavor.
  • mstop_count β€” Array of mstop values. a whole array of mstop counts, slay.
  • rcdev β€” Reset controller entity. the reset-controller representation.
  • pll_dsi_info β€” Array of PLL DSI information, holds the limits and parameters. it's giving PLL DSI details with limits and parameters included. 🫢

πŸ”₯ SEE ALSO πŸ”₯

  • Kernel file ./drivers/clk/renesas/rzv2h-cpg.c struct rzv2h_pll_dsi_info(9), struct mod_clock(9), struct ddiv_clk(9), struct rzv2h_ff_mod_status_clk(9), struct rzv2h_plldsi_div_clk(9), struct rzv2h_plldsi_mux_clk(9), struct rzv2h_cpg_pd(9)

xoxo, your kernel bestie πŸ’– β€” source/version: ./drivers/clk/renesas, date: October 2026, page: struct rzv2h_cpg_priv(9).

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