STRUCT S3C64XX_SPI_PORT_CONFIG(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct s3c64xx_spi_port_config(9) ✨

okay bestie, so this is the kernel API manual page for struct s3c64xx_spi_port_config β€” and yes, the name got a little truncated in the header because it's giving "too iconic for one line" energy πŸ’…. It lives in the kernel API manual, and honestly it's kind of the blueprint for how the Samsung SPI controller hardware info gets described. Let's get into it 🫢


🌸 NAME 🌸

struct s3c64xx_spi_port_config β€” SPI Controller hardware info. that's it, that's the whole vibe. it's the little info packet that tells the driver what the hardware is actually working with ✨


πŸŽ€ SYNOPSIS πŸŽ€

struct s3c64xx_spi_port_config {
    int fifo_lvl_mask[MAX_SPI_PORTS];
    int rx_lvl_offset;
    unsigned int fifo_depth;
    u32 rx_fifomask;
    u32 tx_fifomask;
    int tx_st_done;
    int quirks;
    int clk_div;
    bool high_speed;
    bool clk_from_cmu;
    bool clk_ioclk;
    bool has_loopback;
    bool use_32bit_io;
 };

like, look at her. thirteen members, all with main character energy πŸ‘‘


πŸ¦‹ Members πŸ¦‹

  • fifo_lvl_mask β€” ok so this one is [DEPRECATED] bestie, please use {rx, tx}_fifomask instead. do not come for her, she's retired πŸ’€
  • rx_lvl_offset β€” also [DEPRECATED], and again, the move is {rx,tx}_fifomask instead. lowkey a glow-up replacement situation ✨
  • fifo_depth β€” the depth of the FIFOs. it's used by compatibles where all the instances of the IP define the same FIFO depth. and important: it has higher precedence than the FIFO depth specified via DT. so yeah, this one overrides, no cap πŸ‘‘
  • rx_fifomask β€” this is the SPI_STATUS.RX_FIFO_LVL mask. it's a shifted mask, so it defines both the field's length and its position. iconic little two-for-one πŸŽ€
  • tx_fifomask β€” same situation but for SPI_STATUS.TX_FIFO_LVL. shifted mask, defining the field's length and position. matching set, we love to see it πŸ’…
  • tx_st_done β€” the bit offset of the TX_DONE bit in the SPI_STATUS register. (and yes, the original page says "regiter" β€” we're keeping that typo, it's part of the lore πŸ™ˆ)
  • quirks β€” a bitmask of known quirks. the hardware's little personality traits, if you will 🌈
  • clk_div β€” internal clock divider ⭐
  • high_speed β€” True if the controller supports the HIGH_SPEED_EN bit. fast girl behavior πŸ”₯
  • clk_from_cmu β€” True if the controller does not include a clock mux and prescaler unit 🌸
  • clk_ioclk β€” True if clock is present on this device πŸ¦‹
  • has_loopback β€” True if loopback mode can be supported. round and round we go πŸŽ€
  • use_32bit_io β€” True if the SoC allows only 32-bit register accesses. respect the constraint, fr fr πŸ’œ

πŸ’– Description πŸ’–

so the Samsung s3c64xx SPI controller is used on various Samsung SoC's, but they differ in some aspects β€” like the size of the fifo and the spi bus clock setup πŸ‘€. those differences get specified to the driver using this structure, which is provided as driver data to the driver. it's literally a little "here's what this particular hardware is about" note passed straight through 🫢


🌟 SEE ALSO 🌟

  • Kernel file ./drivers/spi/spi-s3c64xx.c struct s3c64xx_spi_driver_data(9) β€” go read the source bestie, it's all there πŸ’…

and that's the whole page, periodt ✨ this little slice of kernel API manual lore comes from ./drivers/spi, dated October 2026. stay slay, stay compiling, and remember: deprecated members are still members, we just don't use them anymore πŸŽ€πŸ’–

πŸ“¦ where this page comes from