STRUCT S3C64XX_SPI_PORT_CONFIG(9)
β¨ struct s3c64xx_spi_port_config(9) β¨
okay bestie, so this is the kernel API manual page for struct s3c64xx_spi_port_config β and yes, the name got a little truncated in the header because it's giving "too iconic for one line" energy π
. It lives in the kernel API manual, and honestly it's kind of the blueprint for how the Samsung SPI controller hardware info gets described. Let's get into it π«Ά
πΈ NAME πΈ
struct s3c64xx_spi_port_config β SPI Controller hardware info. that's it, that's the whole vibe. it's the little info packet that tells the driver what the hardware is actually working with β¨
π SYNOPSIS π
struct s3c64xx_spi_port_config {
int fifo_lvl_mask[MAX_SPI_PORTS];
int rx_lvl_offset;
unsigned int fifo_depth;
u32 rx_fifomask;
u32 tx_fifomask;
int tx_st_done;
int quirks;
int clk_div;
bool high_speed;
bool clk_from_cmu;
bool clk_ioclk;
bool has_loopback;
bool use_32bit_io;
};
like, look at her. thirteen members, all with main character energy π
π¦ Members π¦
fifo_lvl_maskβ ok so this one is [DEPRECATED] bestie, please use{rx, tx}_fifomaskinstead. do not come for her, she's retired πrx_lvl_offsetβ also [DEPRECATED], and again, the move is{rx,tx}_fifomaskinstead. lowkey a glow-up replacement situation β¨fifo_depthβ the depth of the FIFOs. it's used by compatibles where all the instances of the IP define the same FIFO depth. and important: it has higher precedence than the FIFO depth specified via DT. so yeah, this one overrides, no cap πrx_fifomaskβ this is theSPI_STATUS.RX_FIFO_LVLmask. it's a shifted mask, so it defines both the field's length and its position. iconic little two-for-one πtx_fifomaskβ same situation but forSPI_STATUS.TX_FIFO_LVL. shifted mask, defining the field's length and position. matching set, we love to see it πtx_st_doneβ the bit offset of theTX_DONEbit in theSPI_STATUSregister. (and yes, the original page says "regiter" β we're keeping that typo, it's part of the lore π)quirksβ a bitmask of known quirks. the hardware's little personality traits, if you will πclk_divβ internal clock divider βhigh_speedβTrueif the controller supports theHIGH_SPEED_ENbit. fast girl behavior π₯clk_from_cmuβTrueif the controller does not include a clock mux and prescaler unit πΈclk_ioclkβTrueif clock is present on this device π¦has_loopbackβTrueif loopback mode can be supported. round and round we go πuse_32bit_ioβTrueif the SoC allows only 32-bit register accesses. respect the constraint, fr fr π
π Description π
so the Samsung s3c64xx SPI controller is used on various Samsung SoC's, but they differ in some aspects β like the size of the fifo and the spi bus clock setup π. those differences get specified to the driver using this structure, which is provided as driver data to the driver. it's literally a little "here's what this particular hardware is about" note passed straight through π«Ά
π SEE ALSO π
- Kernel file
./drivers/spi/spi-s3c64xx.cstructs3c64xx_spi_driver_data(9)β go read the source bestie, it's all there π
and that's the whole page, periodt β¨ this little slice of kernel API manual lore comes from ./drivers/spi, dated October 2026. stay slay, stay compiling, and remember: deprecated members are still members, we just don't use them anymore ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms