STRUCT S5P_AES_DEV(9)
π struct s5p_aes_dev(9) π
okay bestie, this is the Kernel API Manual page for struct s5p_aes_dev(9), and she is the crypto device state container. Not me being obsessed with a kernel struct, but here we are β main character energy, no cap. π
β¨ NAME β¨
struct s5p_aes_dev β crypto device state container. That's the whole name, and honestly it's giving exactly what it needs to give. π
π¦ SYNOPSIS π¦
Here's the struct in all her glory, copied exactly so nothing gets renamed, merged, or invented:
struct s5p_aes_dev {
struct device *dev;
struct clk *clk;
struct clk *pclk;
void __iomem *ioaddr;
void __iomem *aes_ioaddr;
int irq_fc;
struct skcipher_request *req;
struct s5p_aes_ctx *ctx;
struct scatterlist *sg_src;
struct scatterlist *sg_dst;
struct scatterlist *sg_src_cpy;
struct scatterlist *sg_dst_cpy;
struct tasklet_struct tasklet;
struct crypto_queue queue;
bool busy;
spinlock_t lock;
struct resource *res;
void __iomem *io_hash_base;
spinlock_t hash_lock;
unsigned long hash_flags;
struct crypto_queue hash_queue;
struct tasklet_struct hash_tasklet;
u8 xmit_buf[BUFLEN];
struct ahash_request *hash_req;
struct scatterlist *hash_sg_iter;
unsigned int hash_sg_cnt;
bool use_hash;
};
π Members π
okay so here's the member-by-member breakdown, iykyk:
devβ associated device. The device she's tied to.clkβ clock for accessing hardware. You need this clock to get at the hardware.pclkβ APB bus clock necessary to access the hardware. The APB bus clock, and yes, it's necessary to access the hardware.ioaddrβ mapped IO memory region. The mapped IO memory area.aes_ioaddrβ per-varian offset for AES block IO memory. The per-varian offset for the AES block IO memory β keeping the original wording, bestie.irq_fcβ feed control interrupt line. The feed control interrupt line.reqβ crypto request currently handled by the device. The crypto request the device is handling right now.ctxβ configuration for currently handled crypto request. The config for the crypto request currently in progress.sg_srcβ scatter list with source data for currently handled block in device. This one is DMA-mapped into device.sg_dstβ scatter list with destination data for currently handled block in device. This one is also DMA-mapped into device.sg_src_cpyβ in case of unaligned access, copied scatter list with source data. Exactly that: the copied scatter list with source data when unaligned access happens.sg_dst_cpyβ in case of unaligned access, copied scatter list with destination data. Same vibe, but destination data.taskletβ new request scheduling jib. Yep, jib. Iconic wording, we keep it.queueβ crypto queue. The crypto queue.busyβ indicates whether the device is currently handling some request thus it uses some of the fields from this state, like:req,ctx,sg_src/sg_dst(and copies). This essentially protects against concurrent access to these fields. Basically: she's the guard telling you whether those fields are in use.lockβ lock for protecting both access to device hardware registers and fields related to current request (including thebusyfield). Both jobs, one lock. Slay.resβ resources for hash. The resources for hash.io_hash_baseβ per-variant offset for HASH block IO memory. The per-variant offset for the HASH block IO memory.hash_lockβ lock for protectinghash_req,hash_queueandhash_flagsvariable. The lock holding down those three.hash_flagsβ flags for current HASH op. Flags for the current HASH operation.hash_queueβ async hash queue. The async hash queue.hash_taskletβ new HASH request scheduling job. The new HASH request scheduling job.xmit_bufβ buffer for current HASH request transfer into SSS block. Buffer time for the current HASH request transfer into the SSS block.hash_reqβ current request sending to SSS HASH block. The current request being sent to the SSS HASH block.hash_sg_iterβ scatterlist transferred through DMA into SSS HASH block. The scatterlist moved through DMA into the SSS HASH block.hash_sg_cntβ counter forhash_sg_iter. Counts thehash_sg_iter.use_hashβtrueif HASH algs enabled. Exactly that.
π SEE ALSO π
Kernel file ./drivers/crypto/s5p-sss.c is the home base, and here's the whole friend group:
struct samsung_aes_variant(9)struct s5p_hash_reqctx(9)struct s5p_hash_ctx(9)s5p_set_dma_hashdata(9)s5p_hash_rx(9)s5p_hash_read_msg(9)s5p_hash_write_ctx_iv(9)s5p_hash_write_iv(9)s5p_hash_copy_result(9)s5p_hash_dma_flush(9)s5p_hash_dma_enable(9)s5p_hash_irq_disable(9)s5p_hash_irq_enable(9)s5p_hash_set_flow(9)s5p_ahash_dma_init(9)s5p_hash_write_ctrl(9)s5p_hash_xmit_dma(9)s5p_hash_copy_sgs(9)s5p_hash_copy_sg_lists(9)s5p_hash_prepare_sgs(9)s5p_hash_prepare_request(9)s5p_hash_update_dma_stop(9)s5p_hash_finish(9)s5p_hash_finish_req(9)s5p_hash_handle_queue(9)s5p_hash_tasklet_cb(9)s5p_hash_enqueue(9)s5p_hash_update(9)s5p_hash_final(9)s5p_hash_finup(9)s5p_hash_init(9)s5p_hash_digest(9)s5p_hash_cra_init_alg(9)s5p_hash_cra_init(9)s5p_hash_cra_exit(9)s5p_hash_export(9)s5p_hash_import(9)
mwah π source/version: ./drivers/crypto; date: October 2026; and yes, we're still talking about struct s5p_aes_dev(9) β periodt. π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms