STRUCT SAMSUNG_PIN_BANK(9)

✨ NAME ✨

okay bestie, welcome to the Kernel API Manual page for struct samsung_pin_bank(9) — yes, the whole entry is about one struct and it is lowkey iconic 🫶. The name tea is: struct samsung_pin_bank — represent a controller pin-bank. That’s the name section, and it ate 💅✨.

🌸 SYNOPSIS 🌸

Here is the full struct, copied exactly because we do not play about code blocks, bestie:

       struct samsung_pin_bank {
           const struct samsung_pin_bank_type *type;
           void __iomem    *pctl_base;
           u32 pctl_offset;
           u8 nr_pins;
           void __iomem    *eint_base;
           u8 eint_func;
           enum eint_type  eint_type;
           u32 eint_mask;
           u32 eint_offset;
           u32 eint_num;
           u32 eint_con_offset;
           u32 eint_mask_offset;
           u32 eint_pend_offset;
           u32 eint_fltcon_offset;
           const char      *name;
           u32 id;
           u32 pin_base;
           void *soc_priv;
           struct fwnode_handle *fwnode;
           struct samsung_pinctrl_drv_data *drvdata;
           struct irq_domain *irq_domain;
           struct gpio_chip gpio_chip;
           struct pinctrl_gpio_range grange;
           struct exynos_irq_chip *irq_chip;
           raw_spinlock_t slock;
           u32 pm_save[PINCFG_TYPE_NUM + 1];
        };

🎀 Members 🎀

quick heads-up: fwnode is chilling in the struct synopsis up there, but the original member notes don’t give it a separate description, so I’m not gonna invent extra lore 🙈.

• type — type of the bank (register offsets and bitfield widths). It’s giving blueprint energy 🧚.
• pctl_base — base address of the pin-bank registers. Address anchor moment 📍.
• pctl_offset — starting offset of the pin-bank registers.
• nr_pins — number of pins included in this bank. Count ’em 💅.
• eint_base — base address of the pin-bank EINT registers.
• eint_func — function to set in CON register to configure pin as EINT.
• eint_type — type of the external interrupt supported by the bank.
• eint_mask — bit mask of pins which support EINT function.
• eint_offset — SoC-specific EINT register or interrupt offset of bank.
• eint_num — total number of eint pins.
• eint_con_offset — ExynosAuto SoC-specific EINT register or interrupt offset of bank.
• eint_mask_offset — ExynosAuto SoC-specific EINT mask register offset of bank.
• eint_pend_offset — ExynosAuto SoC-specific EINT pend register offset of bank.
• eint_fltcon_offset — GS101 SoC-specific EINT filter config register offset.
• name — name to be prefixed for each pin in this pin bank. Cute little name-prefix situation 🎀.
• id — id of the bank, propagated to the pin range.
• pin_base — starting pin number of the bank.
• soc_priv — per-bank private data for SoC-specific code.
• drvdata — link to controller driver data.
• irq_domain — IRQ domain of the bank.
• gpio_chip — GPIO chip of the bank.
• grange — linux gpio pin range supported by this bank.
• irq_chip — link to irq chip for external gpio and wakeup interrupts.
• slock — spinlock protecting bank registers.
• pm_save — saved register values during suspend.

🔥 SEE ALSO 🔥

Kernel file ./drivers/pinctrl/samsung/pinctrl-samsung.h enum pincfg_type(9), enum eint_type(9), struct samsung_pin_bank_type(9), struct samsung_pin_bank_data(9), struct samsung_retention_data(9), struct samsung_pin_ctrl(9), struct samsung_pinctrl_drv_data(9), struct samsung_pinctrl_of_match_data(9), struct samsung_pin_group(9), struct samsung_pmx_func(9).

signed off with love from source ./drivers/pinctrl/samsung, dated October 2026 — that’s the footer tea, bestie 💖✨