STRUCT RZV2H_PLLDSI_DIV_CLK(9)

💅 struct rzv2h_plldsi_div_clk — the PLL DSI DDIV clock, bestie

okay so this is a kernel API manpage from the (9) section, and it's literally all about struct rzv2h_plldsi_div_clk — the PLL DSI DDIV clock 🎀 ngl it's a small one but she's important, so let's get into it ✨

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🌸 NAME 🌸

struct rzv2h_plldsi_div_clk — the PLL DSI DDIV clock 🕰️💖 that's the whole vibe, no cap

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🦋 SYNOPSIS 🦋

here's the icon herself, exactly as she appears 👑

struct rzv2h_plldsi_div_clk {
    const struct clk_div_table *dtable;
    struct rzv2h_cpg_priv *priv;
    struct clk_hw hw;
    struct ddiv ddiv;
 };

like, four members, clean lines, main character energy fr fr 🌈

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✨ Members ✨

okay so let's meet the squad one by one 🫶

• dtable — the divider table 💅 this is where the divider values live, periodt
• priv — CPG private data 🔒 the private stuff, iykyk
• hw — divider clk ⏰ that's the clock hardware struct itself, iconic
• ddiv — divider configuration ⚙️ the config for the divider, slay

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👑 SEE ALSO 👑

if you wanna go deeper (and you should, bestie, it's giving research era 🔥), peep the kernel file ./drivers/clk/renesas/rzv2h-cpg.c — that's where struct this whole thing lives 🌸

and also these absolute legends:

• struct rzv2h_pll_dsi_info(9)
• struct rzv2h_cpg_priv(9)
• struct mod_clock(9)
• struct ddiv_clk(9)
• struct rzv2h_ff_mod_status_clk(9)
• struct rzv2h_plldsi_mux_clk(9)
• struct rzv2h_cpg_pd(9)

go read them all, drink water, and stan a clock driver 💜🧚

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💀 reminder bestie: this is kernel API territory — read the actual source before you go poking at structs, okay? 🙈

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and that's the page! 🌈 sourced from ./drivers/clk/renesas, dated October 2026, and she's the struct rzv2h_plldsi_div_clk(9) manual page 🎀💖 bye bestie, love u, go compile something gorgeous ✨🦋