STRUCT RZG3S_PCIE_PORT(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

Okay bestie, welcome to the struct rzg3s_pcie_port(9) page from the Kernel API Manual ✨ This one is literally the RZ/G3S PCIe Root Port data structure β€” yes, the whole vibe is β€œroot port data, but make it a struct” πŸ’…

✨ SYNOPSIS ✨

Here’s the shape of it, no cap:

struct rzg3s_pcie_port {
    struct clk *refclk;
    u32 vendor_id;
    u32 device_id;
 };

πŸŽ€ Members πŸŽ€

  • refclk β€” the PCIe reference clock πŸ•°οΈ
  • vendor_id β€” the Vendor ID, aka the who-made-it badge πŸ‘‘
  • device_id β€” the Device ID, aka the which-one-is-it tag 🏷️

πŸ¦‹ SEE ALSO πŸ¦‹

Kernel file: ./drivers/pci/controller/pcie-rzg3s-host.c β€” go snoop there if you want the source tea 🍡

  • enum rzg3s_sysc_link_mode(9)
  • struct rzg3s_sysc_function(9)
  • enum rzg3s_sysc_func_id(9)
  • struct rzg3s_sysc_info(9)
  • struct rzg3s_sysc(9)
  • struct rzg3s_pcie_msi(9)
  • enum rzg3s_pcie_controller_id(9)
  • struct rzg3s_pcie_soc_data(9)
  • struct rzg3s_pcie_host(9)

That’s the whole page, bestie 🫢 This cutie comes from the source path ./drivers/pci/controller, dated October 2026, and it’s literally the struct rzg3s_pcie_port(9) manual page. Bye πŸ’…βœ¨

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