STRUCT RZG2L_HWCFG(9)

🌸 NAME 🌸

struct rzg2l_hwcfg — the hardware configuration data structure, bestie. It's literally the vibe-check sheet for the hardware, no cap 💅

This lil page lives in the Kernel API Manual, and it's all about struct rzg2l_hwcfg(9) — ok so let's get into it ✨

✨ SYNOPSIS ✨

struct rzg2l_hwcfg {
    const struct rzg2l_register_offsets regs;
    u16 iolh_groupa_ua[RZG2L_IOLH_IDX_MAX];
    u16 iolh_groupb_ua[RZG2L_IOLH_IDX_MAX];
    u16 iolh_groupc_ua[RZG2L_IOLH_IDX_MAX];
    u16 iolh_groupb_oi[4];
    u16 tint_start_index;
    bool drive_strength_ua;
    bool oen_pwpr_lock;
    u8 func_base;
    u8 oen_max_pin;
    u8 oen_max_port;
 };

Like, look at her. Iconic struct. Every field copied character for character, periodt 🎀

👑 Members 👑

Ok so these are the fields, and yes we're going through all of them, because nobody gets left out on my watch 🫶

• regs — hardware specific register offsets. It's a const struct rzg2l_register_offsets, so it's giving very much "do not touch, this is the blueprint" energy 🔥
• iolh_groupa_ua — IOLH group A uA specific values. Lowkey a u16 array sized RZG2L_IOLH_IDX_MAX 💖
• iolh_groupb_ua — IOLH group B uA specific values. Same deal, u16, RZG2L_IOLH_IDX_MAX 🌸
• iolh_groupc_ua — IOLH group C uA specific values. Yep, group C also showed up and she's also u16[RZG2L_IOLH_IDX_MAX] ✨
• iolh_groupb_oi — IOLH group B output impedance specific values. This one's a u16[4] bestie, exactly 4, don't come for me 🎀
• tint_start_index — the start index for the TINT interrupts. Very "where do we begin" of her 💜
• drive_strength_ua — a bool that says drive strength in uA is supported (otherwise mA is supported). So like, it's uA or mA, pick a lane 😭
• oen_pwpr_lock — flag indicating if the OEN register is locked by PWPR. It's a bool, it's a flag, it's giving "locked or not locked, no in between" 💅
• func_base — base number for port function (see register PFC). A lil u8 with main character energy 👑
• oen_max_pin — the maximum pin number supporting output enable. u8, and yes, it's the maximum pin number 🦋
• oen_max_port — the maximum port number supporting output enable. Also u8, also the maximum port number, they're a matching set fr fr 🌈

Ngl bestie, every field here matters — this struct is literally the hardware config, so please don't go renaming or merging anything. The facts stay exactly where they are 🙈

🦋 SEE ALSO 🦋

Go read these next, iykyk:

• Kernel file ./drivers/pinctrl/renesas/pinctrl-rzg2l.c
• struct rzg2l_register_offsets(9)
• enum rzg2l_iolh_index(9)
• struct rzg2l_pinctrl_pin_settings(9)
• struct rzg2l_pinctrl_reg_cache(9)
• rzg2l_oen_write_with_pwpr(9)

Ok that's the whole page, you ate that 💅✨ This one came from ./drivers/pinctrl/renesas, dated October 2026, and the page itself is struct rzg2l_hwcfg(9) — mwah, go read a pinctrl driver, ily 🫶💖🎀