STRUCT RZG3S_PCIE_HOST(9)

🎀 struct rzg3s_pcie_host(9) 🎀

okay so bestie, welcome to the Kernel API Manual — this is the page for struct rzg3s_pcie_host, and it's literally the RZ/G3S PCIe data structure. yes, the whole vibe. grab a strawberry drink and let's go 💅

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✨ NAME ✨

struct rzg3s_pcie_host — the RZ/G3S PCIe data structure. that's it, that's the whole name section, but it's iconic 🫶

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🌸 SYNOPSIS 🌸

here's the whole struct, copied exactly, no cap:

struct rzg3s_pcie_host {
    void __iomem *axi;
    void __iomem *pcie;
    struct device *dev;
    struct reset_control_bulk_data *power_resets;
    struct reset_control_bulk_data *cfg_resets;
    struct rzg3s_sysc *sysc;
    struct irq_domain *intx_domain;
    const struct rzg3s_pcie_soc_data *data;
    struct rzg3s_pcie_msi msi;
    struct rzg3s_pcie_port port;
    raw_spinlock_t hw_lock;
    int intx_irqs[PCI_NUM_INTX];
    int max_link_speed;
    enum rzg3s_pcie_controller_id controller_id;
    u8 num_lanes;
};

like, look at all those fields. main character struct energy fr fr 💜

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💖 Members 💖

time for the member-by-member vibe check — every single one, no skipping 🦋

• axi — base address for AXI registers
• pcie — base address for PCIe registers
• dev — struct device
• power_resets — reset control signals that should be set after power up
• cfg_resets — reset control signals that should be set after configuration
• sysc — SYSC descriptor
• intx_domain — INTx IRQ domain
• data — SoC specific data
• msi — MSI data structure
• port — PCIe Root Port
• hw_lock — lock for access to the HW resources
• intx_irqs — INTx interrupts
• max_link_speed — maximum supported link speed
• controller_id — PCIe controller identifier, used for System Controller access
• num_lanes — The number of lanes

bestie note: hw_lock is the lock for access to the HW resources — respect the lock, okay? it's guarding the hardware and it will not be lenient 😭

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🌈 SEE ALSO 🌈

the besties of this page, all of them, exactly as listed:

Kernel file ./drivers/pci/controller/pcie-rzg3s-host.c enum rzg3s_sysc_link_mode(9), struct rzg3s_sysc_function(9), enum rzg3s_sysc_func_id(9), struct rzg3s_sysc_info(9), struct rzg3s_sysc(9), struct rzg3s_pcie_msi(9), enum rzg3s_pcie_controller_id(9), struct rzg3s_pcie_soc_data(9), struct rzg3s_pcie_port(9)

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and that's the page!! 💅 this sweet thing lives in ./drivers/pci/controller, October 2026 edition, straight from the Kernel API Manual — go read it, slay, and remember: the facts did not change, only the energy ✨👑💀