STRUCT PVR_PAGE_TABLE_L0_RAW(9)

📦 version 7.3.1, in nixpkgs unstable

💅 struct pvr_p...table_l0_raw(9) — Kernel API Manual 💅

okay bestie, welcome to the Kernel API Manual entry for struct pvr_p...table_l0_raw(9). it's giving low-level page-table realness, and we're gonna get through it together. 🫶

✨ NAME ✨

struct pvr_page_table_l0_raw — the raw data of a level 0 page table. that's the whole vibe. 💖

🌸 SYNOPSIS 🌸

okay so the struct is literally this, no cap:

       struct pvr_page_table_l0_raw {
           struct pvr_page_table_l0_entry_raw
       entries[ROGUE_MMUCTRL_ENTRIES_PT_VALUE_X];
        };

🧩 Members 🧩

  • entries — the raw values of this table. simple as that, bestie. ✨

🦋 Description 🦋

so this type is a structure for type-checking purposes. at compile-time, its size is checked against PVR_MMU_BACKING_PAGE_SIZE. it's giving safety rails, not runtime drama. 🎀

⚠️ CAUTION: ⚠️ the size of level 0 page tables is variable depending on the page size specified in the associated level 1 page table entry. since the device page size in use is pegged to the host page size, it cannot vary at runtime. this structure is therefore only defined to contain the required number of entries for the current device page size. You should never read or write beyond the last supported entry. like, literally do not. that's the rule. 💀

🔥 SEE ALSO 🔥

kernel file: ./drivers/gpu/drm/imagination/pvr_mmu.c — that's where this lives, iykyk. 👑

and here's the full squad of related pages, every single one:

okay that's the whole page, bestie. this came from source ./drivers/gpu/drm/imagination, dated October 2026, and it's the manual for struct pvr_p...table_l0_raw(9). you ate that. periodt. 💅✨🎀

📦 where this page comes from