pvr_page_table_l1_idx(9)

💅 pvr_page_table_l1_idx — a Kernel API Manual moment ✨

okay so bestie, we're in the Kernel API Manual and today's main character is pvr_page_table_l1_idx 🎀 lowkey iconic, highkey useful.

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🌸 NAME 🌸

pvr_page_table_l1_idx — literally calculates the level 1 page table index for a device-virtual address 🦋 no cap, that's the whole job.

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✨ SYNOPSIS ✨

u16 pvr_page_table_l1_idx (u64 device_addr );

she takes one u64 and hands you back a u16, periodt 💅

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🫶 ARGUMENTS 🫶

• device_addr — the target device-virtual address 🌈 that's the thing you're indexing into, bestie.

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👑 DESCRIPTION 👑

right so, the way that this works: it gives you the level 1 page table index that goes with device_addr.

⚠️ but NOT ME forgetting to warn you: this function does not perform any bounds checking 😭 fr fr, zero. none. So it's genuinely the caller's responsibility to make sure device_addr is valid before you go interpreting the result 🙈 like, the function is trusting you completely and that's a lot of pressure tbh.

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⭐ RETURN ⭐

the index into a level 1 page table corresponding to device_addr 🧚 simple, clean, slay.

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💖 SEE ALSO 💖

okay this section is giving extended universe 💀 so buckle up, here's the whole squad:

• kernel file ./drivers/gpu/drm/imagination/pvr_mmu.c
• pvr_mmu_set_flush_flags(9), pvr_mmu_flush_request_all(9), pvr_mmu_flush_exec(9)
• PowerVR Virtual Memory Handling(9), PowerVR Virtual Memory Handling (constants)(9)
• MMU backing pages(9), MMU backing pages (constants)(9)
• struct pvr_mmu_backing_page(9), pvr_mmu_backing_page_init(9), pvr_mmu_backing_page_fini(9), pvr_mmu_backing_page_sync(9)
• Raw page tables(9)
• struct pvr_page_table_l2_entry_raw(9), pvr_page_table_l2_entry_raw_set(9)
• struct pvr_page_table_l1_entry_raw(9), pvr_page_table_l1_entry_raw_set(9)
• struct pvr_page_table_l0_entry_raw(9), struct pvr_page_flags_raw(9), pvr_page_table_l0_entry_raw_set(9), pvr_page_flags_raw_create(9)
• struct pvr_page_table_l2_raw(9), struct pvr_page_table_l1_raw(9), struct pvr_page_table_l0_raw(9)
• Mirror page tables(9)
• struct pvr_page_table_l2(9), pvr_page_table_l2_init(9), pvr_page_table_l2_fini(9), pvr_page_table_l2_sync(9), pvr_page_table_l2_get_raw(9), pvr_page_table_l2_get_entry_raw(9), pvr_page_table_l2_entry_is_valid(9)
• struct pvr_page_table_l1(9), pvr_page_table_l1_init(9), pvr_page_table_l1_free(9), pvr_page_table_l1_sync(9), pvr_page_table_l1_get_raw(9), pvr_page_table_l1_get_entry_raw(9), pvr_page_table_l1_entry_is_valid(9)
• struct pvr_page_table_l0(9), pvr_page_table_l0_init(9), pvr_page_table_l0_free(9), pvr_page_table_l0_sync(9), pvr_page_table_l0_get_raw(9), pvr_page_table_l0_get_entry_raw(9), pvr_page_table_l0_entry_is_valid(9)
• struct pvr_mmu_context(9), struct pvr_page_table_ptr(9), struct pvr_mmu_op_context(9)
• pvr_page_table_l2_insert(9), pvr_page_table_l2_remove(9), pvr_page_table_l1_insert(9), pvr_page_table_l1_remove(9), pvr_page_table_l0_insert(9), pvr_page_table_l0_remove(9)
• Page table index utilities(9), pvr_page_table_l2_idx(9), pvr_page_table_l0_idx(9)
• High-level page table operations(9), pvr_page_table_l1_get_or_insert(9), pvr_page_table_l0_get_or_insert(9), pvr_mmu_context_create(9), pvr_mmu_context_destroy(9), pvr_mmu_get_root_table_dma_addr(9), pvr_page_table_l1_alloc(9), pvr_page_table_l0_alloc(9)
• pvr_mmu_op_context_require_sync(9), pvr_mmu_op_context_sync_manual(9), pvr_mmu_op_context_sync_partial(9), pvr_mmu_op_context_sync(9), pvr_mmu_op_context_load_tables(9), pvr_mmu_op_context_set_curr_page(9), pvr_mmu_op_context_next_page(9)
• Single page operations(9), pvr_page_create(9), pvr_page_destroy(9), pvr_mmu_op_context_destroy(9), pvr_mmu_op_context_create(9), pvr_mmu_op_context_unmap_curr_page(9), pvr_mmu_unmap(9), pvr_mmu_map_sgl(9), pvr_mmu_map(9)

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and that's the whole vibe check 💜 this page lives in ./drivers/gpu/drm/imagination and it's dated October 2026 — so yeah, future-coded king behavior 🔥 go forth and index responsibly, bestie 🫶 iykyk.