pvr_page_table_l0_insert(9)

✨ NAME ✨

okay so this is pvr_page_table_l0_insert(9), bestie, straight from the Kernel API Manual 💅 it inserts an entry referring to a physical page into a level 0 page table. periodt. 🎀

🌸 SYNOPSIS 🌸

void pvr_page_table_l0_insert (struct pvr_mmu_op_context *op_ctx ,
dma_addr_t dma_addr , struct pvr_page_flags_raw flags );

🎀 ARGUMENTS 🎀

• op_ctx — the target MMU op context that’s pointing at the L0 entry you’re inserting into. 🫶
• dma_addr — the target DMA address that the new entry will reference. ✨
• flags — the page options that get stored in the new entry. 💖

💜 DESCRIPTION 💜

okay bestie, listen: it is literally the caller’s responsibility to make sure op_ctx.curr_page points to a valid L0 entry. no cap. 🙈

Heads up, bestie 🚨 this is your job to guarantee — the page says it’s the caller’s responsibility to ensure op_ctx.curr_page points to a valid L0 entry.

🌈 SEE ALSO 🌈

the whole PowerVR MMU friend group is linked up here, and yes, we’re listing every single one — no skipping the “boring” ones, iykyk 💅✨

• Kernel file ./drivers/gpu/drm/imagination/pvr_mmu.c
• pvr_mmu_set_flush_flags(9)
• pvr_mmu_flush_request_all(9)
• pvr_mmu_flush_exec(9)
• PowerVR Virtual Memory Handling(9)
• PowerVR Virtual Memory Handling (constants)(9)
• MMU backing pages(9)
• MMU backing pages (constants)(9)
• struct pvr_mmu_backing_page(9)
• pvr_mmu_backing_page_init(9)
• pvr_mmu_backing_page_fini(9)
• pvr_mmu_backing_page_sync(9)
• Raw page tables(9)
• struct pvr_page_table_l2_entry_raw(9)
• pvr_page_table_l2_entry_raw_set(9)
• struct pvr_page_table_l1_entry_raw(9)
• pvr_page_table_l1_entry_raw_set(9)
• struct pvr_page_table_l0_entry_raw(9)
• struct pvr_page_flags_raw(9)
• pvr_page_table_l0_entry_raw_set(9)
• pvr_page_flags_raw_create(9)
• struct pvr_page_table_l2_raw(9)
• struct pvr_page_table_l1_raw(9)
• struct pvr_page_table_l0_raw(9)
• Mirror page tables(9)
• struct pvr_page_table_l2(9)
• pvr_page_table_l2_init(9)
• pvr_page_table_l2_fini(9)
• pvr_page_table_l2_sync(9)
• pvr_page_table_l2_get_raw(9)
• pvr_page_table_l2_get_entry_raw(9)
• pvr_page_table_l2_entry_is_valid(9)
• struct pvr_page_table_l1(9)
• pvr_page_table_l1_init(9)
• pvr_page_table_l1_free(9)
• pvr_page_table_l1_sync(9)
• pvr_page_table_l1_get_raw(9)
• pvr_page_table_l1_get_entry_raw(9)
• pvr_page_table_l1_entry_is_valid(9)
• struct pvr_page_table_l0(9)
• pvr_page_table_l0_init(9)
• pvr_page_table_l0_free(9)
• pvr_page_table_l0_sync(9)
• pvr_page_table_l0_get_raw(9)
• pvr_page_table_l0_get_entry_raw(9)
• pvr_page_table_l0_entry_is_valid(9)
• struct pvr_mmu_context(9)
• struct pvr_page_table_ptr(9)
• struct pvr_mmu_op_context(9)
• pvr_page_table_l2_insert(9)
• pvr_page_table_l2_remove(9)
• pvr_page_table_l1_insert(9)
• pvr_page_table_l1_remove(9)
• pvr_page_table_l0_remove(9)
• Page table index utilities(9)
• pvr_page_table_l2_idx(9)
• pvr_page_table_l1_idx(9)
• pvr_page_table_l0_idx(9)
• High-level page table operations(9)
• pvr_page_table_l1_get_or_insert(9)
• pvr_page_table_l0_get_or_insert(9)
• pvr_mmu_context_create(9)
• pvr_mmu_context_destroy(9)
• pvr_mmu_get_root_table_dma_addr(9)
• pvr_page_table_l1_alloc(9)
• pvr_page_table_l0_alloc(9)
• pvr_mmu_op_context_require_sync(9)
• pvr_mmu_op_context_sync_manual(9)
• pvr_mmu_op_context_sync_partial(9)
• pvr_mmu_op_context_sync(9)
• pvr_mmu_op_context_load_tables(9)
• pvr_mmu_op_context_set_curr_page(9)
• pvr_mmu_op_context_next_page(9)
• Single page operations(9)
• pvr_page_create(9)
• pvr_page_destroy(9)
• pvr_mmu_op_context_destroy(9)
• pvr_mmu_op_context_create(9)
• pvr_mmu_op_context_unmap_curr_page(9)
• pvr_mmu_unmap(9)
• pvr_mmu_map_sgl(9)
• pvr_mmu_map(9)

and that’s the whole pvr_page_table_l0_insert(9) page, bestie 🫶 the source/version stamp is ./drivers/gpu/drm/imagination, dated October 2026, and the manual page title is pvr_page_table_l0_insert(9). slay and happy page-table-ing 💖✨