pvr_mmu_op_...sync_partial(9)
π
pvr_mmu_op_context_sync_partial(9) β the "Kernel API Manual" glow-up β¨
okay so bestie, welcome to the Kernel API Manual page for pvr_mmu_op_context_sync_partial π this one's short and sweet and honestly kind of a diva move β it's the "sync some of my page tables, not all of them" function. iykyk π
πΈ NAME πΈ
pvr_mmu_op_context_sync_partial β triggers a sync of some or all of the page tables that a MMU op context is pointing at. like, girly said "i don't need the whole flush, just this bit" π
β¨ SYNOPSIS β¨
void pvr_mmu_op_context_sync_partial (struct pvr_mmu_op_context *op_ctx
, enum pvr_mmu_sync_level level );
no cap, that's the whole signature β returns void, so no status to check, she just does it π«Ά
π¦ ARGUMENTS π¦
op_ctxβ the target MMU op context. this is the main character of the whole operation π it's astruct pvr_mmu_op_context *and it's the thing holding the record of everything that needs syncing.levelβ the requested page table level to sync up to, inclusive. that "inclusive" is doing real work here, ngl β the level you name gets synced too, fr fr π₯ it's anenum pvr_mmu_sync_level.
π DESCRIPTION π
so here's the tea, bestie π β this function is the picky one. it syncs page tables, but only up to a level you choose. and there are two little rules layered on top of that, because of course there are π
rule one, the clamp: if level is greater than the maximum level that op_ctx has recorded as requiring a sync operation, then only that previously recorded maximum gets used. translation: you can't ask for a bigger sync than what's actually been flagged as needing one β the function just quietly caps you at the recorded max π
rule two, the reset: additionally, if level is greater than or equal to the maximum level recorded by op_ctx as requiring a sync operation, that maximum level gets reset β because a full sync is gonna happen anyway π and heads up: that outcome is equivalent to calling pvr_mmu_op_context_sync. so if you're going all the way up, just know you're getting the full-sync behaviour, no half measures π
ngl, the > vs >= distinction is the whole personality of this function β greater than gets clamped, greater than or equal gets clamped and resets the recorded max. don't sleep on that equality sign bestie β¨
π SEE ALSO π
like, the entire PowerVR virtual memory universe, honestly. she's connected to everyone π first up, the source file:
- Kernel file
./drivers/gpu/drm/imagination/pvr_mmu.c
and the whole friend group π₯
pvr_mmu_set_flush_flags(9)pvr_mmu_flush_request_all(9)pvr_mmu_flush_exec(9)- PowerVR Virtual Memory Handling(9)
- PowerVR Virtual Memory Handling (constants)(9)
- MMU backing pages(9)
- MMU backing pages (constants)(9)
struct pvr_mmu_backing_page(9)pvr_mmu_backing_page_init(9)pvr_mmu_backing_page_fini(9)pvr_mmu_backing_page_sync(9)- Raw page tables(9)
struct pvr_page_table_l2_entry_raw(9)pvr_page_table_l2_entry_raw_set(9)struct pvr_page_table_l1_entry_raw(9)pvr_page_table_l1_entry_raw_set(9)struct pvr_page_table_l0_entry_raw(9)struct pvr_page_flags_raw(9)pvr_page_table_l0_entry_raw_set(9)pvr_page_flags_raw_create(9)struct pvr_page_table_l2_raw(9)struct pvr_page_table_l1_raw(9)struct pvr_page_table_l0_raw(9)- Mirror page tables(9)
struct pvr_page_table_l2(9)pvr_page_table_l2_init(9)pvr_page_table_l2_fini(9)pvr_page_table_l2_sync(9)pvr_page_table_l2_get_raw(9)pvr_page_table_l2_get_entry_raw(9)pvr_page_table_l2_entry_is_valid(9)struct pvr_page_table_l1(9)pvr_page_table_l1_init(9)pvr_page_table_l1_free(9)pvr_page_table_l1_sync(9)pvr_page_table_l1_get_raw(9)pvr_page_table_l1_get_entry_raw(9)pvr_page_table_l1_entry_is_valid(9)struct pvr_page_table_l0(9)pvr_page_table_l0_init(9)pvr_page_table_l0_free(9)pvr_page_table_l0_sync(9)pvr_page_table_l0_get_raw(9)pvr_page_table_l0_get_entry_raw(9)pvr_page_table_l0_entry_is_valid(9)struct pvr_mmu_context(9)struct pvr_page_table_ptr(9)struct pvr_mmu_op_context(9)pvr_page_table_l2_insert(9)pvr_page_table_l2_remove(9)pvr_page_table_l1_insert(9)pvr_page_table_l1_remove(9)pvr_page_table_l0_insert(9)pvr_page_table_l0_remove(9)- Page table index utilities(9)
pvr_page_table_l2_idx(9)pvr_page_table_l1_idx(9)pvr_page_table_l0_idx(9)- High-level page table operations(9)
pvr_page_table_l1_get_or_insert(9)pvr_page_table_l0_get_or_insert(9)pvr_mmu_context_create(9)pvr_mmu_context_destroy(9)pvr_mmu_get_root_table_dma_addr(9)pvr_page_table_l1_alloc(9)pvr_page_table_l0_alloc(9)pvr_mmu_op_context_require_sync(9)pvr_mmu_op_context_sync_manual(9)pvr_mmu_op_context_sync(9)pvr_mmu_op_context_load_tables(9)pvr_mmu_op_context_set_curr_page(9)pvr_mmu_op_context_next_page(9)- Single page operations(9)
pvr_page_create(9)pvr_page_destroy(9)pvr_mmu_op_context_destroy(9)pvr_mmu_op_context_create(9)pvr_mmu_op_context_unmap_curr_page(9)pvr_mmu_unmap(9)pvr_mmu_map_sgl(9)pvr_mmu_map(9)
β¨ that's the whole page, bestie β¨ straight outta ./drivers/gpu/drm/imagination, dated October 2026, and the page itself is pvr_mmu_op_...sync_partial(9). go sync something partially, you absolute icon πππ¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms