pvr_page_tab...try_is_valid(9)

💅 pvr_page_tab...try_is_valid(9) 💅

okay so welcome to this Kernel API Manual page, bestie — we’re checking out pvr_page_table_l0_entry_is_valid, and yes the title is giving “text message that got cut off mid-sentence.” 💀

✨ NAME ✨

pvr_page_table_l0_entry_is_valid — checks if a level 0 page table entry is marked as valid. no cap, that’s literally the whole vibe check. 🦋

🦋 SYNOPSIS 🦋

       bool pvr_page_table_l0_entry_is_valid (struct pvr_page_table_l0 *table ,
       u16 idx );

🎀 ARGUMENTS 🎀

• table — the target level 0 page table. this is the main character table you’re checking. 👑
• idx — the index of the entry to check. the specific spot in the table, iykyk. 🔍

💜 DESCRIPTION 💜

okay so important caveat, bestie: the value of idx is not checked here. not even a little. it is the caller’s responsibility to make sure idx refers to a valid index within table before calling this function. so like, do your vibe check first — this function is not doing it for you. 🫶

🌈 SEE ALSO 🌈

the whole friend group, fr fr — every single reference is right here:

• Kernel file ./drivers/gpu/drm/imagination/pvr_mmu.c
• pvr_mmu_set_flush_flags(9)
• pvr_mmu_flush_request_all(9)
• pvr_mmu_flush_exec(9)
• PowerVR Virtual Memory Handling(9)
• PowerVR Virtual Memory Handling (constants)(9)
• MMU backing pages(9)
• MMU backing pages (constants)(9)
• struct pvr_mmu_backing_page(9)
• pvr_mmu_backing_page_init(9)
• pvr_mmu_backing_page_fini(9)
• pvr_mmu_backing_page_sync(9)
• Raw page tables(9)
• struct pvr_page_table_l2_entry_raw(9)
• pvr_page_table_l2_entry_raw_set(9)
• struct pvr_page_table_l1_entry_raw(9)
• pvr_page_table_l1_entry_raw_set(9)
• struct pvr_page_table_l0_entry_raw(9)
• struct pvr_page_flags_raw(9)
• pvr_page_table_l0_entry_raw_set(9)
• pvr_page_flags_raw_create(9)
• struct pvr_page_table_l2_raw(9)
• struct pvr_page_table_l1_raw(9)
• struct pvr_page_table_l0_raw(9)
• Mirror page tables(9)
• struct pvr_page_table_l2(9)
• pvr_page_table_l2_init(9)
• pvr_page_table_l2_fini(9)
• pvr_page_table_l2_sync(9)
• pvr_page_table_l2_get_raw(9)
• pvr_page_table_l2_get_entry_raw(9)
• pvr_page_table_l2_entry_is_valid(9)
• struct pvr_page_table_l1(9)
• pvr_page_table_l1_init(9)
• pvr_page_table_l1_free(9)
• pvr_page_table_l1_sync(9)
• pvr_page_table_l1_get_raw(9)
• pvr_page_table_l1_get_entry_raw(9)
• pvr_page_table_l1_entry_is_valid(9)
• struct pvr_page_table_l0(9)
• pvr_page_table_l0_init(9)
• pvr_page_table_l0_free(9)
• pvr_page_table_l0_sync(9)
• pvr_page_table_l0_get_raw(9)
• pvr_page_table_l0_get_entry_raw(9)
• struct pvr_mmu_context(9)
• struct pvr_page_table_ptr(9)
• struct pvr_mmu_op_context(9)
• pvr_page_table_l2_insert(9)
• pvr_page_table_l2_remove(9)
• pvr_page_table_l1_insert(9)
• pvr_page_table_l1_remove(9)
• pvr_page_table_l0_insert(9)
• pvr_page_table_l0_remove(9)
• Page table index utilities(9)
• pvr_page_table_l2_idx(9)
• pvr_page_table_l1_idx(9)
• pvr_page_table_l0_idx(9)
• High-level page table operations(9)
• pvr_page_table_l1_get_or_insert(9)
• pvr_page_table_l0_get_or_insert(9)
• pvr_mmu_context_create(9)
• pvr_mmu_context_destroy(9)
• pvr_mmu_get_root_table_dma_addr(9)
• pvr_page_table_l1_alloc(9)
• pvr_page_table_l0_alloc(9)
• pvr_mmu_op_context_require_sync(9)
• pvr_mmu_op_context_sync_manual(9)
• pvr_mmu_op_context_sync_partial(9)
• pvr_mmu_op_context_sync(9)
• pvr_mmu_op_context_load_tables(9)
• pvr_mmu_op_context_set_curr_page(9)
• pvr_mmu_op_context_next_page(9)
• Single page operations(9)
• pvr_page_create(9)
• pvr_page_destroy(9)
• pvr_mmu_op_context_destroy(9)
• pvr_mmu_op_context_create(9)
• pvr_mmu_op_context_unmap_curr_page(9)
• pvr_mmu_unmap(9)
• pvr_mmu_map_sgl(9)
• pvr_mmu_map(9)

this page’s source/version is ./drivers/gpu/drm/imagination, and the date on it is October 2026 — signing off, bestie! 💖🎀