pvr_page_table_l0_sync(9)

💅 pvr_page_table_l0_sync(9) — Kernel API Manual 💅

okay bestie, welcome to the pvr_page_table_l0_sync(9) page in the Kernel API Manual ✨ we're talking about flushing a level 0 page table from the CPU to the device, and it's giving very important little helper energy 🦋

✨ NAME ✨

pvr_page_table_l0_sync — flush a level 0 page table from the CPU to the device 💖

🫶 SYNOPSIS 🫶

void pvr_page_table_l0_sync (struct pvr_page_table_l0 *table );

🎀 ARGUMENTS 🎀

• table — the target level 0 page table, aka the one we're syncing 👑

💖 DESCRIPTION 💖

So this function is literally just a thin wrapper around pvr_mmu_backing_page_sync, which means the warning from that function applies here too — no cap. Only call pvr_page_table_l0_sync once you're sure you have no more changes to make to table in the immediate future. Periodt. Don't be out here syncing while you're still making changes, bestie, that's not the vibe 😭

Also important: if child pages of table also need to be flushed, this should be done first using a DMA sync function (e.g. dma_sync_sg_for_device) before calling this function. Order matters, okay? Main character energy is doing the child-page flush first 👑

🌈 SEE ALSO 🌈

• Kernel file ./drivers/gpu/drm/imagination/pvr_mmu.c
• pvr_mmu_set_flush_flags(9)
• pvr_mmu_flush_request_all(9)
• pvr_mmu_flush_exec(9)
• PowerVR Virtual Memory Handling(9)
• PowerVR Virtual Memory Handling (constants)(9)
• MMU backing pages(9)
• MMU backing pages (constants)(9)
• struct pvr_mmu_backing_page(9)
• pvr_mmu_backing_page_init(9)
• pvr_mmu_backing_page_fini(9)
• pvr_mmu_backing_page_sync(9)
• Raw page tables(9)
• struct pvr_page_table_l2_entry_raw(9)
• pvr_page_table_l2_entry_raw_set(9)
• struct pvr_page_table_l1_entry_raw(9)
• pvr_page_table_l1_entry_raw_set(9)
• struct pvr_page_table_l0_entry_raw(9)
• struct pvr_page_flags_raw(9)
• pvr_page_table_l0_entry_raw_set(9)
• pvr_page_flags_raw_create(9)
• struct pvr_page_table_l2_raw(9)
• struct pvr_page_table_l1_raw(9)
• struct pvr_page_table_l0_raw(9)
• Mirror page tables(9)
• struct pvr_page_table_l2(9)
• pvr_page_table_l2_init(9)
• pvr_page_table_l2_fini(9)
• pvr_page_table_l2_sync(9)
• pvr_page_table_l2_get_raw(9)
• pvr_page_table_l2_get_entry_raw(9)
• pvr_page_table_l2_entry_is_valid(9)
• struct pvr_page_table_l1(9)
• pvr_page_table_l1_init(9)
• pvr_page_table_l1_free(9)
• pvr_page_table_l1_sync(9)
• pvr_page_table_l1_get_raw(9)
• pvr_page_table_l1_get_entry_raw(9)
• pvr_page_table_l1_entry_is_valid(9)
• struct pvr_page_table_l0(9)
• pvr_page_table_l0_init(9)
• pvr_page_table_l0_free(9)
• pvr_page_table_l0_get_raw(9)
• pvr_page_table_l0_get_entry_raw(9)
• pvr_page_table_l0_entry_is_valid(9)
• struct pvr_mmu_context(9)
• struct pvr_page_table_ptr(9)
• struct pvr_mmu_op_context(9)
• pvr_page_table_l2_insert(9)
• pvr_page_table_l2_remove(9)
• pvr_page_table_l1_insert(9)
• pvr_page_table_l1_remove(9)
• pvr_page_table_l0_insert(9)
• pvr_page_table_l0_remove(9)
• Page table index utilities(9)
• pvr_page_table_l2_idx(9)
• pvr_page_table_l1_idx(9)
• pvr_page_table_l0_idx(9)
• High-level page table operations(9)
• pvr_page_table_l1_get_or_insert(9)
• pvr_page_table_l0_get_or_insert(9)
• pvr_mmu_context_create(9)
• pvr_mmu_context_destroy(9)
• pvr_mmu_get_root_table_dma_addr(9)
• pvr_page_table_l1_alloc(9)
• pvr_page_table_l0_alloc(9)
• pvr_mmu_op_context_require_sync(9)
• pvr_mmu_op_context_sync_manual(9)
• pvr_mmu_op_context_sync_partial(9)
• pvr_mmu_op_context_sync(9)
• pvr_mmu_op_context_load_tables(9)
• pvr_mmu_op_context_set_curr_page(9)
• pvr_mmu_op_context_next_page(9)
• Single page operations(9)
• pvr_page_create(9)
• pvr_page_destroy(9)
• pvr_mmu_op_context_destroy(9)
• pvr_mmu_op_context_create(9)
• pvr_mmu_op_context_unmap_curr_page(9)
• pvr_mmu_unmap(9)
• pvr_mmu_map_sgl(9)
• pvr_mmu_map(9)

And for the cute little sign-off, bestie: source/version ./drivers/gpu/drm/imagination, date October 2026, page pvr_page_table_l0_sync(9) — mwah, go read those references and slay 💋✨