pvr_page_ta...ntry_raw_set(9)

💅 pvr_page_ta...ntry_raw_set(9) 💅

okay so bestie, this is the Kernel API Manual page for pvr_page_ta...ntry_raw_set(9), and it’s literally about writing a valid entry into a raw level 2 page table. tiny function, very specific job, main character energy fr fr 🎀

---

✨ NAME ✨

pvr_page_table_l2_entry_raw_set — write a valid entry into a raw level 2 page table. that’s the whole vibe. 💖

---

🌸 SYNOPSIS 🌸

void pvr_page_table_l2_entry_raw_set (struct pvr_page_table_l2_entry_raw
*entry , dma_addr_t child_table_dma_addr );

---

🦋 ARGUMENTS 🦋

• entry — the target raw level 2 page table entry. this is the little spot you’re writing into, bestie ✨
• child_table_dma_addr — the DMA address of the level 1 page table that’s getting associated with entry. yes, it’s a whole page-table situationship 💅

---

🔥 DESCRIPTION 🔥

When you call this function, child_table_dma_addr must be a valid DMA address, and it must be a multiple of ROGUE_MMUCTRL_PC_DATA_PD_BASE_ALIGNSIZE. no cap. this is a hard requirement, not a suggestion 🫶

bestie please respect the alignment rule. the manual says “must,” and we do not argue with a “must” in a kernel API page 😭

---

🌈 SEE ALSO 🌈

• kernel file: ./drivers/gpu/drm/imagination/pvr_mmu.c 👑
• flush + big-picture MMU lore: pvr_mmu_set_flush_flags(9), pvr_mmu_flush_request_all(9), pvr_mmu_flush_exec(9), PowerVR Virtual Memory Handling(9), PowerVR Virtual Memory Handling (constants)(9), MMU backing pages(9), MMU backing pages (constants)(9), struct pvr_mmu_backing_page(9), pvr_mmu_backing_page_init(9), pvr_mmu_backing_page_fini(9), pvr_mmu_backing_page_sync(9) 🧚
• raw page table crew: Raw page tables(9), struct pvr_page_table_l2_entry_raw(9), struct pvr_page_table_l1_entry_raw(9), pvr_page_table_l1_entry_raw_set(9), struct pvr_page_table_l0_entry_raw(9), struct pvr_page_flags_raw(9), pvr_page_table_l0_entry_raw_set(9), pvr_page_flags_raw_create(9), struct pvr_page_table_l2_raw(9), struct pvr_page_table_l1_raw(9), struct pvr_page_table_l0_raw(9) 💜
• mirror page table besties: Mirror page tables(9), struct pvr_page_table_l2(9), pvr_page_table_l2_init(9), pvr_page_table_l2_fini(9), pvr_page_table_l2_sync(9), pvr_page_table_l2_get_raw(9), pvr_page_table_l2_get_entry_raw(9), pvr_page_table_l2_entry_is_valid(9), struct pvr_page_table_l1(9), pvr_page_table_l1_init(9), pvr_page_table_l1_free(9), pvr_page_table_l1_sync(9), pvr_page_table_l1_get_raw(9), pvr_page_table_l1_get_entry_raw(9), pvr_page_table_l1_entry_is_valid(9), struct pvr_page_table_l0(9), pvr_page_table_l0_init(9), pvr_page_table_l0_free(9), pvr_page_table_l0_sync(9), pvr_page_table_l0_get_raw(9), pvr_page_table_l0_get_entry_raw(9), pvr_page_table_l0_entry_is_valid(9) 🌸
• context + table ops: struct pvr_mmu_context(9), struct pvr_page_table_ptr(9), struct pvr_mmu_op_context(9), pvr_page_table_l2_insert(9), pvr_page_table_l2_remove(9), pvr_page_table_l1_insert(9), pvr_page_table_l1_remove(9), pvr_page_table_l0_insert(9), pvr_page_table_l0_remove(9) ⭐
• index utilities: Page table index utilities(9), pvr_page_table_l2_idx(9), pvr_page_table_l1_idx(9), pvr_page_table_l0_idx(9) 🍓
• high-level page table operations: High-level page table operations(9), pvr_page_table_l1_get_or_insert(9), pvr_page_table_l0_get_or_insert(9), pvr_mmu_context_create(9), pvr_mmu_context_destroy(9), pvr_mmu_get_root_table_dma_addr(9), pvr_page_table_l1_alloc(9), pvr_page_table_l0_alloc(9), pvr_mmu_op_context_require_sync(9), pvr_mmu_op_context_sync_manual(9), pvr_mmu_op_context_sync_partial(9), pvr_mmu_op_context_sync(9), pvr_mmu_op_context_load_tables(9), pvr_mmu_op_context_set_curr_page(9), pvr_mmu_op_context_next_page(9) 🦋
• single page operations: Single page operations(9), pvr_page_create(9), pvr_page_destroy(9), pvr_mmu_op_context_destroy(9), pvr_mmu_op_context_create(9), pvr_mmu_op_context_unmap_curr_page(9), pvr_mmu_unmap(9), pvr_mmu_map_sgl(9), pvr_mmu_map(9) 💀

---

that’s the whole page, bestie. it lives under ./drivers/gpu/drm/imagination, dated October 2026, and it’s literally pvr_page_ta...ntry_raw_set(9) — iconic, specific, and fully aligned (when you follow the rule) 💅✨🎀