pvr_page_table_l2_insert(9)

🌸 NAME 🌸

okay so bestie, this is pvr_page_table_l2_insert(9) from the Kernel API Manual — the page where we insert an entry referring to a level 1 page table into a level 2 page table. tiny function, very page-table main character energy. 💅✨

pvr_page_table_l2_insert — insert an entry referring to a level 1 page table into a level 2 page table. 🎀

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✨ SYNOPSIS ✨

the whole signature is literally right here:

void pvr_page_table_l2_insert (struct pvr_mmu_op_context *op_ctx ,
struct pvr_page_table_l1 *child_table );

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🎀 ARGUMENTS 🎀

• op_ctx — target MMU op context pointing at the entry where the L1 page table gets inserted. 🫶
• child_table — target level 1 page table that the new entry will reference. 🌸

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💅 DESCRIPTION 💅

okay, important part, bestie — this function trusts you a LOT:

• It is the caller's responsibility to ensure op_ctx.curr_page points to a valid L2 entry. ✅
• It is the caller's responsibility to execute any memory barries to ensure that the creation of child_table is ordered before the L2 entry is inserted. ✅ (yes, the page says “barries” — iykyk, do not come for me 💀)

⚠️ fr fr, those are caller responsibilities. no cap. the function is not doing the vibe check for you. 🚨

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🔥 SEE ALSO 🔥

the kernel file is ./drivers/gpu/drm/imagination/pvr_mmu.c, and here is the full reference squad — every single one, no skipping, periodt:

• pvr_mmu_set_flush_flags(9)
• pvr_mmu_flush_request_all(9)
• pvr_mmu_flush_exec(9)
• PowerVR Virtual Memory Handling(9)
• PowerVR Virtual Memory Handling (constants)(9)
• MMU backing pages(9)
• MMU backing pages (constants)(9)
• struct pvr_mmu_backing_page(9)
• pvr_mmu_backing_page_init(9)
• pvr_mmu_backing_page_fini(9)
• pvr_mmu_backing_page_sync(9)
• Raw page tables(9)
• struct pvr_page_table_l2_entry_raw(9)
• pvr_page_table_l2_entry_raw_set(9)
• struct pvr_page_table_l1_entry_raw(9)
• pvr_page_table_l1_entry_raw_set(9)
• struct pvr_page_table_l0_entry_raw(9)
• struct pvr_page_flags_raw(9)
• pvr_page_table_l0_entry_raw_set(9)
• pvr_page_flags_raw_create(9)
• struct pvr_page_table_l2_raw(9)
• struct pvr_page_table_l1_raw(9)
• struct pvr_page_table_l0_raw(9)
• Mirror page tables(9)
• struct pvr_page_table_l2(9)
• pvr_page_table_l2_init(9)
• pvr_page_table_l2_fini(9)
• pvr_page_table_l2_sync(9)
• pvr_page_table_l2_get_raw(9)
• pvr_page_table_l2_get_entry_raw(9)
• pvr_page_table_l2_entry_is_valid(9)
• struct pvr_page_table_l1(9)
• pvr_page_table_l1_init(9)
• pvr_page_table_l1_free(9)
• pvr_page_table_l1_sync(9)
• pvr_page_table_l1_get_raw(9)
• pvr_page_table_l1_get_entry_raw(9)
• pvr_page_table_l1_entry_is_valid(9)
• struct pvr_page_table_l0(9)
• pvr_page_table_l0_init(9)
• pvr_page_table_l0_free(9)
• pvr_page_table_l0_sync(9)
• pvr_page_table_l0_get_raw(9)
• pvr_page_table_l0_get_entry_raw(9)
• pvr_page_table_l0_entry_is_valid(9)
• struct pvr_mmu_context(9)
• struct pvr_page_table_ptr(9)
• struct pvr_mmu_op_context(9)
• pvr_page_table_l2_remove(9)
• pvr_page_table_l1_insert(9)
• pvr_page_table_l1_remove(9)
• pvr_page_table_l0_insert(9)
• pvr_page_table_l0_remove(9)
• Page table index utilities(9)
• pvr_page_table_l2_idx(9)
• pvr_page_table_l1_idx(9)
• pvr_page_table_l0_idx(9)
• High-level page table operations(9)
• pvr_page_table_l1_get_or_insert(9)
• pvr_page_table_l0_get_or_insert(9)
• pvr_mmu_context_create(9)
• pvr_mmu_context_destroy(9)
• pvr_mmu_get_root_table_dma_addr(9)
• pvr_page_table_l1_alloc(9)
• pvr_page_table_l0_alloc(9)
• pvr_mmu_op_context_require_sync(9)
• pvr_mmu_op_context_sync_manual(9)
• pvr_mmu_op_context_sync_partial(9)
• pvr_mmu_op_context_sync(9)
• pvr_mmu_op_context_load_tables(9)
• pvr_mmu_op_context_set_curr_page(9)
• pvr_mmu_op_context_next_page(9)
• Single page operations(9)
• pvr_page_create(9)
• pvr_page_destroy(9)
• pvr_mmu_op_context_destroy(9)
• pvr_mmu_op_context_create(9)
• pvr_mmu_op_context_unmap_curr_page(9)
• pvr_mmu_unmap(9)
• pvr_mmu_map_sgl(9)
• pvr_mmu_map(9)

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okay, that’s the whole page, bestie! the source/version vibes point at ./drivers/gpu/drm/imagination, and the date on this one is October 2026. mwah 💋🫶