pvr_mmu_map(9)
π pvr_mmu_map(9) π
okay so this is pvr_mmu_map(9) from the Kernel API Manual, and it is literally the βmap an objectβs virtual memory to physical memoryβ bestie. no cap. π
β¨ NAME β¨
pvr_mmu_map β map an objectβs virtual memory to physical memory. periodt. π¦
πΈ SYNOPSIS πΈ
int pvr_mmu_map (struct pvr_mmu_op_context *op_ctx , u64 size , u64
flags , u64 device_addr );
π ARGUMENTS π
op_ctxβ the target MMU op context. thatβs the main character of this call, fr fr.sizeβ size of memory to be mapped, in bytes. it must be a non-zero multiple of the device page size. not optional, bestie. πflagsβ flags frompvr_gem_objectassociated with the mapping. yep, those flags.device_addrβ virtual device address to map to. it must be device page-aligned. no crumbs, just alignment. β¨
π«Ά RETURN π«Ά
0on success, or- any error code returned by
pvr_page_table_ptr_init, or - any error code returned by
pvr_mmu_map_sgl, or - any error code returned by
pvr_page_table_ptr_next_page.
like, if it works you get 0. if not, the error code is coming from one of those three functions. iykyk. π
π SEE ALSO π
- the kernel file:
./drivers/gpu/drm/imagination/pvr_mmu.cπ§ pvr_mmu_set_flush_flags(9)pvr_mmu_flush_request_all(9)pvr_mmu_flush_exec(9)PowerVR Virtual Memory Handling(9)PowerVR Virtual Memory Handling (constants)(9)MMU backing pages(9)MMU backing pages (constants)(9)struct pvr_mmu_backing_page(9)pvr_mmu_backing_page_init(9)pvr_mmu_backing_page_fini(9)pvr_mmu_backing_page_sync(9)Raw page tables(9)struct pvr_page_table_l2_entry_raw(9)pvr_page_table_l2_entry_raw_set(9)struct pvr_page_table_l1_entry_raw(9)pvr_page_table_l1_entry_raw_set(9)struct pvr_page_table_l0_entry_raw(9)struct pvr_page_flags_raw(9)pvr_page_table_l0_entry_raw_set(9)pvr_page_flags_raw_create(9)struct pvr_page_table_l2_raw(9)struct pvr_page_table_l1_raw(9)struct pvr_page_table_l0_raw(9)Mirror page tables(9)struct pvr_page_table_l2(9)pvr_page_table_l2_init(9)pvr_page_table_l2_fini(9)pvr_page_table_l2_sync(9)pvr_page_table_l2_get_raw(9)pvr_page_table_l2_get_entry_raw(9)pvr_page_table_l2_entry_is_valid(9)struct pvr_page_table_l1(9)pvr_page_table_l1_init(9)pvr_page_table_l1_free(9)pvr_page_table_l1_sync(9)pvr_page_table_l1_get_raw(9)pvr_page_table_l1_get_entry_raw(9)pvr_page_table_l1_entry_is_valid(9)struct pvr_page_table_l0(9)pvr_page_table_l0_init(9)pvr_page_table_l0_free(9)pvr_page_table_l0_sync(9)pvr_page_table_l0_get_raw(9)pvr_page_table_l0_get_entry_raw(9)pvr_page_table_l0_entry_is_valid(9)struct pvr_mmu_context(9)struct pvr_page_table_ptr(9)struct pvr_mmu_op_context(9)pvr_page_table_l2_insert(9)pvr_page_table_l2_remove(9)pvr_page_table_l1_insert(9)pvr_page_table_l1_remove(9)pvr_page_table_l0_insert(9)pvr_page_table_l0_remove(9)Page table index utilities(9)pvr_page_table_l2_idx(9)pvr_page_table_l1_idx(9)pvr_page_table_l0_idx(9)High-level page table operations(9)pvr_page_table_l1_get_or_insert(9)pvr_page_table_l0_get_or_insert(9)pvr_mmu_context_create(9)pvr_mmu_context_destroy(9)pvr_mmu_get_root_table_dma_addr(9)pvr_page_table_l1_alloc(9)pvr_page_table_l0_alloc(9)pvr_mmu_op_context_require_sync(9)pvr_mmu_op_context_sync_manual(9)pvr_mmu_op_context_sync_partial(9)pvr_mmu_op_context_sync(9)pvr_mmu_op_context_load_tables(9)pvr_mmu_op_context_set_curr_page(9)pvr_mmu_op_context_next_page(9)Single page operations(9)pvr_page_create(9)pvr_page_destroy(9)pvr_mmu_op_context_destroy(9)pvr_mmu_op_context_create(9)pvr_mmu_op_context_unmap_curr_page(9)pvr_mmu_unmap(9)pvr_mmu_map_sgl(9)
thatβs the whole crew, bestie. read them, love them, cite them. ππ
catch you later, bestie π β this one comes from ./drivers/gpu/drm/imagination, dated October 2026. slay. π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms