pvr_page_table_l2_idx(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so bestie, this is pvr_page_table_l2_idx(9) from the Kernel API Manual β€” and it's literally here to calculate the level 2 page table index for a device-virtual address. that's the whole assignment, no cap πŸ’…


🌸 SYNOPSIS 🌸

u16 pvr_page_table_l2_idx (u64 device_addr );

not me presenting the signature exactly because character-for-character matters, iykyk 🫢


πŸŽ€ ARGUMENTS πŸŽ€

  • device_addr β€” target device-virtual address. that's the address, bestie: the device-virtual one ✨

πŸ¦‹ DESCRIPTION πŸ¦‹

Okay real talk: this function does not perform any bounds checking 😭 like none at all. It is the caller's responsibility to ensure that device_addr is valid before interpreting the result. so do your little vibe check on the address first β€” the function is not gonna do it for you πŸ’€


πŸ’… RETURN πŸ’…

It returns the index into a level 2 page table corresponding to device_addr. slay, that's the return value πŸ‘‘βœ¨


🌈 SEE ALSO 🌈

Kernel file ./drivers/gpu/drm/imagination/pvr_mmu.c, pvr_mmu_set_flush_flags(9), pvr_mmu_flush_request_all(9), pvr_mmu_flush_exec(9), PowerVR Virtual Memory Handling(9), PowerVR Virtual Memory Handling (constants)(9), MMU backing pages(9), MMU backing pages (constants)(9), struct pvr_mmu_backing_page(9), pvr_mmu_backing_page_init(9), pvr_mmu_backing_page_fini(9), pvr_mmu_backing_page_sync(9), Raw page tables(9), struct pvr_page_table_l2_entry_raw(9), pvr_page_table_l2_entry_raw_set(9), struct pvr_page_table_l1_entry_raw(9), pvr_page_table_l1_entry_raw_set(9), struct pvr_page_table_l0_entry_raw(9), struct pvr_page_flags_raw(9), pvr_page_table_l0_entry_raw_set(9), pvr_page_flags_raw_create(9), struct pvr_page_table_l2_raw(9), struct pvr_page_table_l1_raw(9), struct pvr_page_table_l0_raw(9), Mirror page tables(9), struct pvr_page_table_l2(9), pvr_page_table_l2_init(9), pvr_page_table_l2_fini(9), pvr_page_table_l2_sync(9), pvr_page_table_l2_get_raw(9), pvr_page_table_l2_get_entry_raw(9), pvr_page_table_l2_entry_is_valid(9), struct pvr_page_table_l1(9), pvr_page_table_l1_init(9), pvr_page_table_l1_free(9), pvr_page_table_l1_sync(9), pvr_page_table_l1_get_raw(9), pvr_page_table_l1_get_entry_raw(9), pvr_page_table_l1_entry_is_valid(9), struct pvr_page_table_l0(9), pvr_page_table_l0_init(9), pvr_page_table_l0_free(9), pvr_page_table_l0_sync(9), pvr_page_table_l0_get_raw(9), pvr_page_table_l0_get_entry_raw(9), pvr_page_table_l0_entry_is_valid(9), struct pvr_mmu_context(9), struct pvr_page_table_ptr(9), struct pvr_mmu_op_context(9), pvr_page_table_l2_insert(9), pvr_page_table_l2_remove(9), pvr_page_table_l1_insert(9), pvr_page_table_l1_remove(9), pvr_page_table_l0_insert(9), pvr_page_table_l0_remove(9), Page table index utilities(9), pvr_page_table_l1_idx(9), pvr_page_table_l0_idx(9), High-level page table operations(9), pvr_page_table_l1_get_or_insert(9), pvr_page_table_l0_get_or_insert(9), pvr_mmu_context_create(9), pvr_mmu_context_destroy(9), pvr_mmu_get_root_table_dma_addr(9), pvr_page_table_l1_alloc(9), pvr_page_table_l0_alloc(9), pvr_mmu_op_context_require_sync(9), pvr_mmu_op_context_sync_manual(9), pvr_mmu_op_context_sync_partial(9), pvr_mmu_op_context_sync(9), pvr_mmu_op_context_load_tables(9), pvr_mmu_op_context_set_curr_page(9), pvr_mmu_op_context_next_page(9), Single page operations(9), pvr_page_create(9), pvr_page_destroy(9), pvr_mmu_op_context_destroy(9), pvr_mmu_op_context_create(9), pvr_mmu_op_context_unmap_curr_page(9), pvr_mmu_unmap(9), pvr_mmu_map_sgl(9), pvr_mmu_map(9). yes, every single one, I did not skip a ref πŸ˜€πŸ’–


xoxo, source/version ./drivers/gpu/drm/imagination, dated October 2026 β€” mwah πŸ’‹πŸŽ€

πŸ“¦ where this page comes from