drm_dp_bw_c...g_efficiency(9)
π drm_dp_bw_channel_coding_efficiency(9) β NAME β¨
okay so bestie, this is a page from the Kernel API Manual and it's about drm_dp_bw_channel_coding_efficiency β aka the function that tells you how much of your DisplayPort link's bandwidth actually survives the encoding overhead. it's giving "how much of the pizza is crust" energy. π
π SYNOPSIS π
int drm_dp_bw_channel_coding_efficiency (bool is_uhbr );
π ARGUMENTS π
is_uhbrβ the vibe check flag: is this link using 128b/132b channel coding or not? that's literally all it wants to know. π¦
π DESCRIPTION π
so this function returns the channel coding efficiency of whatever DP link type you hand it. and there are exactly two options in this whole situation, no in-between:
8b/10b128b/132bβ aka UHBR, main character energy π
the corresponding overhead it's counting includes:
- the
8b -> 10bpixel data to link symbol conversion overhead - the
128b -> 132bpixel data to link symbol conversion overhead - and for
128b/132bspecifically, any link or PHY level control symbol insertion overhead β that'sLLCP,FEC,PHY syncβ see DP Standard v2.1 3.5.2.18 if you wanna read the receipts π
ngl for8b/10bthe correspondingFECoverhead is BW allocation specific, and it's already included in the value returned bydrm_dp_bw_overheadβ so don't go double-counting it, bestie, i'm warning you π
and what does it actually give back? it returns the efficiency in the 100%/coding-overhead% ratio in 1ppm units. iconic. precise. slay. π
πΈ SEE ALSO πΈ
kay so this is the part where the manpage just. lists everyone. the whole friend group. i'm not kidding, there are so many. but every single one is here because that's the rules π«Ά
the main event:
Kernel file ./drivers/gpu/drm/display/drm_dp_helper.c
and then literally everyone else:
dp helpers(9)drm_dp_phy_name(9)drm_dp_lttpr_wake_timeout_setup(9)dp helpers(9)drm_dp_dpcd_probe(9)drm_dp_dpcd_set_powered(9)drm_dp_dpcd_set_probe(9)drm_dp_dpcd_read(9)drm_dp_dpcd_write(9)drm_dp_dpcd_read_link_status(9)drm_dp_dpcd_read_phy_link_status(9)drm_dp_link_power_up(9)drm_dp_link_power_down(9)drm_dp_dpcd_write_payload(9)drm_dp_dpcd_clear_payload(9)drm_dp_dpcd_poll_act_handled(9)drm_dp_downstream_is_type(9)drm_dp_downstream_is_tmds(9)drm_dp_send_real_edid_checksum(9)drm_dp_read_dpcd_caps(9)drm_dp_read_downstream_info(9)drm_dp_downstream_max_dotclock(9)drm_dp_downstream_max_tmds_clock(9)drm_dp_downstream_min_tmds_clock(9)drm_dp_downstream_max_bpc(9)drm_dp_downstream_420_passthrough(9)drm_dp_downstream_444_to_420_conversion(9)drm_dp_downstream_rgb_to_ycbcr_conversion(9)drm_dp_downstream_mode(9)drm_dp_downstream_id(9)drm_dp_downstream_debug(9)drm_dp_subconnector_type(9)drm_dp_set_subconnector_property(9)drm_dp_read_sink_count_cap(9)drm_dp_read_sink_count(9)drm_dp_remote_aux_init(9)drm_dp_aux_init(9)drm_dp_aux_register(9)drm_dp_aux_unregister(9)drm_dp_psr_setup_time(9)drm_dp_start_crc(9)drm_dp_stop_crc(9)drm_dp_read_desc(9)drm_dp_dump_lttpr_desc(9)drm_dp_dsc_sink_bpp_incr(9)drm_dp_dsc_slice_count_to_mask(9)drm_dp_dsc_sink_slice_count_mask(9)drm_dp_dsc_sink_max_slice_count(9)drm_dp_dsc_sink_line_buf_depth(9)drm_dp_dsc_sink_supported_input_bpcs(9)drm_dp_dsc_sink_max_slice_throughput(9)drm_dp_dsc_branch_max_overall_throughput(9)drm_dp_dsc_branch_max_line_width(9)drm_dp_read_lttpr_common_caps(9)drm_dp_read_lttpr_phy_caps(9)drm_dp_lttpr_count(9)drm_dp_lttpr_max_link_rate(9)drm_dp_lttpr_set_transparent_mode(9)drm_dp_lttpr_init(9)drm_dp_lttpr_max_lane_count(9)drm_dp_lttpr_voltage_swing_level_3_supported(9)drm_dp_lttpr_pre_emphasis_level_3_supported(9)drm_dp_get_phy_test_pattern(9)drm_dp_set_phy_test_pattern(9)drm_dp_as_sdp_supported(9)drm_dp_vsc_sdp_supported(9)drm_dp_vsc_sdp_pack(9)drm_dp_get_pcon_max_frl_bw(9)drm_dp_pcon_frl_prepare(9)drm_dp_pcon_is_frl_ready(9)drm_dp_pcon_frl_configure_1(9)drm_dp_pcon_frl_configure_2(9)drm_dp_pcon_reset_frl_config(9)drm_dp_pcon_frl_enable(9)drm_dp_pcon_hdmi_link_active(9)drm_dp_pcon_hdmi_link_mode(9)drm_dp_pcon_hdmi_frl_link_error_count(9)drm_dp_pcon_pps_default(9)drm_dp_pcon_pps_override_buf(9)drm_edp_backlight_set_level(9)drm_edp_backlight_enable(9)drm_edp_backlight_disable(9)drm_edp_backlight_init(9)drm_panel_dp_aux_backlight(9)drm_dp_link_symbol_cycles(9)drm_dp_bw_overhead(9)drm_dp_max_dprx_data_rate(9)
like. that's the whole roster. iykyk π
okay that's the page!! it lives in ./drivers/gpu/drm/display, it's dated October 2026, and this whole little kernel-docs moment was brought to you by the Kernel API Manual. go forth and compute your coding efficiency, bestie β you're gonna ate it. πβ¨π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms