drm_dp_pcon_...override_buf(9)
π drm_dp_pcon_pps_override_buf β Kernel API Manual β¨
okay so bestie, welcome to the Kernel API Manual β yes we're doing kernel docs now, and honestly? iconic of you. this page is all about drm_dp_pcon_pps_override_buf, and it's a short one, so sip your lil drink and let's go π
πΈ NAME πΈ
drm_dp_pcon_pps_override_buf β configure the PPS encoder override buffer for your HDMI sink. that's the whole vibe. π
π« SYNOPSIS π«
int drm_dp_pcon_pps_override_buf (struct drm_dp_aux *aux , u8 pps_buf[128] );
look at her. two args, one int, zero drama. slay π
π ARGUMENTS π
auxβ the DisplayPort AUX channel. that's the lil side-channel everyone's talking through π¦pps_bufβ the128bytes that the PCON is gonna write into the PPS buffer for the HDMI sink. exactly128. no cap, not127, not129. one hundred and twenty-eight π
β DESCRIPTION β
so what does she actually do? she sets up the PPS encoder override buffer for the HDMI sink, that's the whole thing β and then she tells you how it went:
- returns
0on success π - otherwise she returns a negative error code π (not a vibe, but at least she's honest)
no hidden lore, no extra params, that's it. main character energy with a tiny screenplay π
quick vibe check: this page keeps the description exactly as honest as the original β success is 0, failure is a negative error code, and there's literally nothing more claimed. don't be out here inventing behaviour, bestie, iykyk π₯
π§ SEE ALSO π§
the whole friend group, fr fr β and yes, we're listing every single one π€
- Kernel file
./drivers/gpu/drm/display/drm_dp_helper.c,dp helpers(9),drm_dp_phy_name(9),drm_dp_lttpr_wake_timeout_setup(9),dp helpers(9) drm_dp_dpcd_probe(9),drm_dp_dpcd_set_powered(9),drm_dp_dpcd_set_probe(9),drm_dp_dpcd_read(9),drm_dp_dpcd_write(9),drm_dp_dpcd_read_link_status(9),drm_dp_dpcd_read_phy_link_status(9),drm_dp_link_power_up(9),drm_dp_link_power_down(9)drm_dp_dpcd_write_payload(9),drm_dp_dpcd_clear_payload(9),drm_dp_dpcd_poll_act_handled(9),drm_dp_downstream_is_type(9),drm_dp_downstream_is_tmds(9),drm_dp_send_real_edid_checksum(9),drm_dp_read_dpcd_caps(9),drm_dp_read_downstream_info(9)drm_dp_downstream_max_dotclock(9),drm_dp_downstream_max_tmds_clock(9),drm_dp_downstream_min_tmds_clock(9),drm_dp_downstream_max_bpc(9),drm_dp_downstream_420_passthrough(9),drm_dp_downstream_444_to_420_conversion(9),drm_dp_downstream_rgb_to_ycbcr_conversion(9),drm_dp_downstream_mode(9),drm_dp_downstream_id(9),drm_dp_downstream_debug(9)drm_dp_subconnector_type(9),drm_dp_set_subconnector_property(9),drm_dp_read_sink_count_cap(9),drm_dp_read_sink_count(9)drm_dp_remote_aux_init(9),drm_dp_aux_init(9),drm_dp_aux_register(9),drm_dp_aux_unregister(9),drm_dp_psr_setup_time(9),drm_dp_start_crc(9),drm_dp_stop_crc(9),drm_dp_read_desc(9),drm_dp_dump_lttpr_desc(9)drm_dp_dsc_sink_bpp_incr(9),drm_dp_dsc_slice_count_to_mask(9),drm_dp_dsc_sink_slice_count_mask(9),drm_dp_dsc_sink_max_slice_count(9),drm_dp_dsc_sink_line_buf_depth(9),drm_dp_dsc_sink_supported_input_bpcs(9),drm_dp_dsc_sink_max_slice_throughput(9),drm_dp_dsc_branch_max_overall_throughput(9),drm_dp_dsc_branch_max_line_width(9)drm_dp_read_lttpr_common_caps(9),drm_dp_read_lttpr_phy_caps(9),drm_dp_lttpr_count(9),drm_dp_lttpr_max_link_rate(9),drm_dp_lttpr_set_transparent_mode(9),drm_dp_lttpr_init(9),drm_dp_lttpr_max_lane_count(9),drm_dp_lttpr_voltage_swing_level_3_supported(9),drm_dp_lttpr_pre_emphasis_level_3_supported(9)drm_dp_get_phy_test_pattern(9),drm_dp_set_phy_test_pattern(9),drm_dp_as_sdp_supported(9),drm_dp_vsc_sdp_supported(9),drm_dp_vsc_sdp_pack(9),drm_dp_get_pcon_max_frl_bw(9),drm_dp_pcon_frl_prepare(9),drm_dp_pcon_is_frl_ready(9),drm_dp_pcon_frl_configure_1(9),drm_dp_pcon_frl_configure_2(9),drm_dp_pcon_reset_frl_config(9),drm_dp_pcon_frl_enable(9),drm_dp_pcon_hdmi_link_active(9),drm_dp_pcon_hdmi_link_mode(9),drm_dp_pcon_hdmi_frl_link_error_count(9),drm_dp_pcon_pps_default(9)drm_edp_backlight_set_level(9),drm_edp_backlight_enable(9),drm_edp_backlight_disable(9),drm_edp_backlight_init(9),drm_panel_dp_aux_backlight(9),drm_dp_link_symbol_cycles(9),drm_dp_bw_overhead(9),drm_dp_bw_channel_coding_efficiency(9),drm_dp_max_dprx_data_rate(9)
and that's the whole page, bestie π«Ά go configure that override buffer, you're literally built for this.
π this lil group chat happened because of the source file ./drivers/gpu/drm/display, dated October 2026 β big kisses to whoever maintains it π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms